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1 Simple BLOCK The simple block represents only a way of partitioning the code. It allows concurrent statements to be clustered into a BLOCK, with t...
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posted @ 2015-05-21 01:38
mengdie
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GENERATE It is another concurrent statement (along with operators and WHEN). Itis equivalent to the sequential statement LOOP in the sense that ital...
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posted @ 2015-05-20 23:39
mengdie
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WHEN (simple and selected) It is one of the fundamental concurrent statements (alongwith operators and GENERATE). It appears in two forms: WHEN / EL...
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posted @ 2015-05-20 22:07
mengdie
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Using operators Operators can be used to implement any combinational circuit. However, as willbecome apparent later, complex circuits are usually eas...
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posted @ 2015-05-20 21:56
mengdie
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Examples1) Force input1 to 0 at the current simulator time. force input1 02) Force the fourth element of the array bus1 to 1 at the current simulat...
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posted @ 2015-05-20 17:24
mengdie
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force This command allows you to apply stimulus interactively to VHDL signals(not variables), Verilog nets and registers, and SystemC boundary types....
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posted @ 2015-05-20 14:59
mengdie
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JMP Jump unconditionallySyntax JMP labelOperation PC + 2 × offset −> PCDescription The 10-bit signed offset contained in the instruction LSBs ...
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posted @ 2015-05-19 22:36
mengdie
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Assembler Code Content of ROM MOV R10,R11 MOV R10,R11Length: One or two wordsOperation: Move the content of R10 to R11. R10 is not aff...
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posted @ 2015-05-18 19:49
mengdie
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Assembler Code Content of ROMMOV @R10+,0(R11) MOV @R10+,0(R11)Length: One or two wordsOperation: Move the contents of the source ad...
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posted @ 2015-05-18 17:14
mengdie
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MOV[.W] Move source to destinationMOV.B Move source to destinationSyntax MOV src,dst or MOV.W src,dst MOV.B src,dstOperation ...
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posted @ 2015-05-18 17:03
mengdie
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