在参考友晶科技DE25-Nano 开发板的CD资料GHRD工程来设计my_first_hps 工程的时候LPDDR4A_REFCLK_p手动设置为PIN_B55， 系统却自动跳到PIN_A58：

645AE720F7269A09C89F09D53F9D33E3

 

企业微信截图_1770864666165

 

引脚跳变以后系统编译时会报错：

Error(14566): The Fitter cannot place 5 periphery component(s) due to conflicts with existing constraints (1 I/O input buffer(s), 4 BYTE(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.intel.com/content/www/us/en/support/programmable/kdb-filter.html and search for this specific error message number. 
    Error(175001): The Fitter cannot place 1 I/O input buffer, which is within Generic Component soc_system_emif_io96b_hps_0. 
        Error(16234): No legal location could be found out of 563 considered location(s).  Reasons why each location could not be used are summarized below: 
            Error(175006): There is no routing connectivity between source I/O pad and the I/O input buffer 
                Error(175022): The I/O input buffer could not be placed in any location to satisfy its connectivity requirements 
            Error(175006): There is no routing connectivity between source I/O pad and the I/O input buffer 
                Error(175022): The source I/O pad could not be placed in any location to satisfy its connectivity requirements 
                Error(175022): The I/O input buffer could not be placed in any location to satisfy its connectivity requirements 
    Error(175001): The Fitter cannot place 1 BYTE, which is within Generic Component soc_system_emif_io96b_hps_0. 
        Error(16234): No legal location could be found out of 16 considered location(s).  Reasons why each location could not be used are summarized 

 

请直接参考DE25-Nano 的GHRD工程里面的golden_top.qsf文件，直接将相关内容复制到你自己工程的.qsf文件即可。

 

比如我复制了这些内容到我自己的.qsf文件：

#============================================================
# LPDDR4A
#============================================================
set_instance_assignment -name IO_STANDARD "1.1-V TRUE DIFFERENTIAL SIGNALING" -to LPDDR4A_REFCLK_p
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CS_n
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[0]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[1]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[2]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[3]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[4]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CA[5]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_CK
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_CKE
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_CK_n
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DM[0]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DM[1]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DM[2]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DM[3]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[0]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[1]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[2]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[3]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[4]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[5]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[6]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[7]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[8]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[9]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[10]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[11]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[12]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[13]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[14]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[15]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[16]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[17]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[18]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[19]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[20]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[21]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[22]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[23]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[24]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[25]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[26]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[27]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[28]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[29]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[30]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_DQ[31]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS[3]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS_n[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS_n[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS_n[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.1-V LVSTL" -to LPDDR4A_DQS_n[3]
set_instance_assignment -name IO_STANDARD "1.1-V LVSTL" -to LPDDR4A_RESET_n
set_instance_assignment -name IO_STANDARD "1.1-V" -to LPDDR4A_RZQ
set_location_assignment PIN_B55 -to LPDDR4A_REFCLK_p
set_location_assignment PIN_B58 -to LPDDR4A_CS_n
set_location_assignment PIN_B66 -to LPDDR4A_CA[0]
set_location_assignment PIN_A68 -to LPDDR4A_CA[1]
set_location_assignment PIN_B68 -to LPDDR4A_CA[2]
set_location_assignment PIN_A70 -to LPDDR4A_CA[3]
set_location_assignment PIN_B63 -to LPDDR4A_CA[4]
set_location_assignment PIN_A66 -to LPDDR4A_CA[5]
set_location_assignment PIN_J42 -to LPDDR4A_CK
set_location_assignment PIN_A61 -to LPDDR4A_CKE
set_location_assignment PIN_G42 -to LPDDR4A_CK_n
set_location_assignment PIN_J59 -to LPDDR4A_DM[0]
set_location_assignment PIN_T59 -to LPDDR4A_DM[1]
set_location_assignment PIN_J27 -to LPDDR4A_DM[2]
set_location_assignment PIN_A25 -to LPDDR4A_DM[3]
set_location_assignment PIN_T62 -to LPDDR4A_DQ[0]
set_location_assignment PIN_T56 -to LPDDR4A_DQ[1]
set_location_assignment PIN_G56 -to LPDDR4A_DQ[2]
set_location_assignment PIN_E56 -to LPDDR4A_DQ[3]
set_location_assignment PIN_G65 -to LPDDR4A_DQ[4]
set_location_assignment PIN_J65 -to LPDDR4A_DQ[5]
set_location_assignment PIN_M56 -to LPDDR4A_DQ[6]
set_location_assignment PIN_M62 -to LPDDR4A_DQ[7]
set_location_assignment PIN_W62 -to LPDDR4A_DQ[8]
set_location_assignment PIN_M65 -to LPDDR4A_DQ[9]
set_location_assignment PIN_M51 -to LPDDR4A_DQ[10]
set_location_assignment PIN_T51 -to LPDDR4A_DQ[11]
set_location_assignment PIN_AB48 -to LPDDR4A_DQ[12]
set_location_assignment PIN_W48 -to LPDDR4A_DQ[13]
set_location_assignment PIN_T65 -to LPDDR4A_DQ[14]
set_location_assignment PIN_AB62 -to LPDDR4A_DQ[15]
set_location_assignment PIN_G24 -to LPDDR4A_DQ[16]
set_location_assignment PIN_E24 -to LPDDR4A_DQ[17]
set_location_assignment PIN_J35 -to LPDDR4A_DQ[18]
set_location_assignment PIN_T32 -to LPDDR4A_DQ[19]
set_location_assignment PIN_M32 -to LPDDR4A_DQ[20]
set_location_assignment PIN_T24 -to LPDDR4A_DQ[21]
set_location_assignment PIN_G35 -to LPDDR4A_DQ[22]
set_location_assignment PIN_M24 -to LPDDR4A_DQ[23]
set_location_assignment PIN_A22 -to LPDDR4A_DQ[24]
set_location_assignment PIN_A23 -to LPDDR4A_DQ[25]
set_location_assignment PIN_A33 -to LPDDR4A_DQ[26]
set_location_assignment PIN_B33 -to LPDDR4A_DQ[27]
set_location_assignment PIN_B30 -to LPDDR4A_DQ[28]
set_location_assignment PIN_A36 -to LPDDR4A_DQ[29]
set_location_assignment PIN_A20 -to LPDDR4A_DQ[30]
set_location_assignment PIN_B22 -to LPDDR4A_DQ[31]
set_location_assignment PIN_G62 -to LPDDR4A_DQS[0]
set_location_assignment PIN_AB56 -to LPDDR4A_DQS[1]
set_location_assignment PIN_G32 -to LPDDR4A_DQS[2]
set_location_assignment PIN_B28 -to LPDDR4A_DQS[3]
set_location_assignment PIN_E62 -to LPDDR4A_DQS_n[0]
set_location_assignment PIN_W56 -to LPDDR4A_DQS_n[1]
set_location_assignment PIN_E32 -to LPDDR4A_DQS_n[2]
set_location_assignment PIN_A30 -to LPDDR4A_DQS_n[3]
set_location_assignment PIN_M48 -to LPDDR4A_RESET_n
set_location_assignment PIN_T48 -to LPDDR4A_RZQ