XPS 工程目录下各文件内容
To view the XPS directory structure, refer to XPS Directory Structure Outline.
Contains intermediate files generated by XPS and various other tools for internal management purpose. You should not use this directory, but do not delete it.
This directory contains files including SVG, PNG, or JPG format files (UNIX only) representing the design in the form of a block diagram.
Contains the MicroBlaze™ or PowerPC® bootloop executables that cause the MicroBlaze or PowerPC embedded processors to loop at the reset vector. This guarantees that the embedded processor stays in a known good state. XPS creates the bootloops automatically for each new project. To make use of the bootloop, mark the bootloop application in your software project for initialization of block RAMs.
Required. This directory contains the User Constraints File (UCF). See the Xilinx® ISE® documentation for more information about the UCF file.
This directory contains the following files:
- bitgen.ut: Contains the options used to create the ISE Bitstream (BIT) file
- download.cmd: Specification of the JTAG chain
- fast_runtime.opt: Contains the commands and options to run NGDBuild, MAP, and PAR.
- BSDL files - any Boundary Scan Description Language (BSDL) files for devices in the JTAG chain.
Note XPS creates this directory automatically when you create a project. You must modify some of the files in this directory so they correspond to the board you have selected.
Platgen creates this directory automatically when you run the Hardware > Generate Netlist process. The directory contains all the Hardware Description Language (HDL) files representing the processor system.
XPS creates this directory automatically when you run the Hardware > Generate Bitstream process. It contains a copy of the User Constraints (UCF) file, Block RAM Memory Map (BMM) file, and the implementation results, including the BIT file. XPS will run either Xflow or SmartXplorer internally to generate files in this directory.
Optional. Use this directory to include custom hardware peripherals for the processor system. For additional information, refer to the "Platform Generator (Platgen)" chapter in the Embedded System Tools Reference Manual.
This directory is created when you export hardware information and files to the Software Development Kit (SDK) for an XPS project. It contains information related to hardware handoff files for SDK, software applications in SDK, settings, and other SDK-specific information.
XPS creates this directory automatically when you select Simulation > Generate Simulation HDL Files. Simgen produces all the simulation files for each simulation in the appropriate sub-directory. The files created include HDL wrappers for peripherals, top-level embedded system files, and optional test bench files. Simulator compile and helper scripts are also generated.
Note See Also: EDK Simulation Basics
Platgen creates this directory automatically when the Hardware > Generate Netlist process is run. The directory contains all the XST synthesis scripts and log files that create the netlists used for implementation.
