A3P250 verilog LED 闪烁

 

module led( clk_40mhz, led_1 );

input clk_40mhz;  // pin62
output led_1;     // pin13

reg led_reg;

reg [31:0] tick_cnt = 32'd0;

always @(posedge clk_40mhz) begin

    tick_cnt <= tick_cnt + 32'd1;
    
    if(tick_cnt>=32'd40000000) begin
        tick_cnt <= 32'd0;
        led_reg <= ~led_reg;
    end

end

assign led_1 = led_reg;

endmodule

 

硬件信息：

　Part Number : A3P250-VQ100

上图：