ICC2 design setup

#####ICC2 design setup

set DESIGN_NAME   "top_cell"(the top cell name of verilog)

 

###set reference libraries

set REFERENCE_LIBRARY [list \

XXXX.ndm

]

 

####tech files and setup

set TECH_FLIE   “XXXXX.tf”

 

####read verilog

set VERILOG_NETLIST_FILES   "XXXXX.v"

 

####read UPF

set UPF_FILE   “XXXX.upf”

 

#####  

set SCAN_DEF_FILE   “XXXX.scandef”

 

#####

set TCL_ANNTENNA_RULE   "antenna_rule.tcl"

 

#####

set TIE_LIB_CELL_LIST   "*/TIE1* */TIE0*"

 

set CTS_LIB_CELL_LIST  "*/BUFCK8 */BUFCK12 */BUFCK16 */INVCK8 */INVCK12 */INVCK16"(大的CKBUFFER 保证驱动能力)

 

posted @ 2023-04-27 10:36  chippeace  阅读(202)  评论(0)    收藏  举报