野火FPGA征途开发板配套教学视频之多路选择器测试代码文件更正tb_mux2_1.v

timescale 1ns/1ns

module tb_mux2_1 ();

    reg     in_1;
    reg     in_2;
    reg     sel;

    wire    out;

    initial begin
        in_1 = 1'b0;
        in_2 = 1'b0;
        sel  = 1'b0;
    end

    always #10 begin
        in_1 <= {$random} % 2;
        in_2 <= {$random} % 2;
        sel  <= {$random} % 2;   
    end

    initial begin
        $timeformat(-9,0,"ns",6);
        $monitor("@time %t: in_1 = %b, in_2 = %b, sel = %b, out = %b",
                $time, in_1, in_2, sel, out);
    end



    mux2_1 mux2_1_inst1(
        .in_1(in_1),   //输入信号1
        .in_2(in_2),   //输入信号2
        .sel (sel),   //选通信号

        .out (out)    //输出信号
    );

endmodule