SystemVerilog time slot 时间片

SystemVerilog time slot 时间片

概要

Regions that are designed to implement correct RTL functionality:

• Active regions (Active, Inactive and NBA regions - but avoid Inactive region events).

Regions that are designed to implement correct verification execution:

• Preponed, Reactive regions (Reactive, Re-Inactive, Re-NBA) and Postponed regions.

Regions that are designed to implement concurrent assertion checking:

• Preponed, Observed, and Reactive regions.

Region that should be avoided:

• Inactive region.

不同region的作用

preponed event region

• 主要作用是并行断言在这个region中进行采样，每个time slot只执行一次（没有反馈路径能在一个slot中执行多次preponed）

• There is some doubt as to whether an implementation actually must perform the sampling in the Preponed region or if the sampling may be done in the Postponed region of the previous time slot. Because both, Postponed and Preponed are read-only regions, the actual signal values are the same in any two contiguous Postponed-Preponed regions, thus, it is not observable in which region the simulator actually samples a value – the only value that is different is the simulation time.

  • 大概意思，在preponed采样还是在前一个slot的postponed采样都有可能，因为这两个区域都是只读区域，能看出差别的是，这两次属于不同的时间片，仿真时间不一样。

• Sampled values are always defined with respect to a clocking expression. Therefore, it is only necessary to sample values in the Preponed region of the time slot in which the clocking expression is triggered, and not in every time slot. When processing in the Preponed region, how does the simulator know that a clock will be triggered later during the processing of that particular time slot? The answer is that the simulator does not need to know about any future events, it only needs to ensure that the values present in the Preponed region are available to the sampling constructs when the clocking expression is actually triggered while processing the latter regions. The simulator can accomplish this by maintaining two values for each sampled signal, its current value and its value when the Preponed region was processed. This way, when the sampling clock is triggered, the sampling construct simply uses the value corresponding to the Preponed region. While many optimizations are available to the simulator – including but not limited to peeking in the event queue for potential clocking events – the sampling mechanism can be illustrated as an intra-region (or a time slot) delay gate, as shown in Figure 7.

  • 这段话说得有意思了，采样通常伴随着时钟表达式，因此，只需要在时钟表达式被触发的时间片中的preponed region对信号进行采样。但是因为preponed是在时间片最早发生，怎么确定在这个slot时钟就触发了？答案是仿真器并不会预测未来的时间，它只需要保证当在slot中时钟被触发的时候，前面preponed region的值是可用的

active region set （active - inactive - NBA）

• 整个region set的用途：调度module中的阻塞、非阻塞赋值、或者module中的task、或者函数。
• active region set的意图是：调度RTL 和行为级代码的活动
• testbench也可以写在module里，但是建议写在program块中，以隔离设计代码和testbench代码的执行

acitive region set 中的 active events region

active event region是acitive region set中的一部分，主要作用是计算和执行所有当前module的活动，包括了：

• Execute all module blocking assignments（执行阻塞赋值）
• Evaluate RHS of all nonblocking assignment and schedule updates into NBA region（计算非阻塞赋值表达式右值）
• Execute all module continuous assignments (keyword "assign")（执行连续赋值语句）
• Evaluate inputs and update outputs of Verilog primitives（计算输入并更新verilog原语输入）
• Execute $display and $finish

为什么always中组合逻辑要用阻塞赋值？

all RTL combinational logic modeled using an always block should be coded using blocking assignments to ensure that combinational logic executes in the Active region and correctly models real combinational hardware behavior.

acitive region set 中的 inactive event region

• 执行内容：#0 blocking assignments are scheduled
• 在使用中，不要使用#0 0延时过程赋值语句
• Proper usage of the NBA region makes the Inactive region unnecessary.

acitive region set 中的 NBA event region

• 更新非阻塞赋值的左值（LHS）

• Sunburst Design Race Avoidance Guidelines #2 and #4 also address RTL coding using nonblocking assignments to correctly model latches and sequential logic with simple combinational input logic. See references [3] and [5] for examples and details.

  锁存器和时序逻辑+组合逻辑输入的情况下也需要使用非阻塞赋值

Observed Region

• evaluate the concurrent assertions using the values sampled in the Preponed region.

• 使用前面preponed的采样值计算并行断言

• Observed Region为什么存在反馈路径？

  Assertions that execute a pass or fail action block, actually schedule a process associated with the pass and fail code into the Reactive regions, not in the Observed region. This is because concurrent assertions are designed to behave strictly as monitors, thus, they are not allowed to modify the state of the design. But, if assertions cannot schedule any Active region events, why is there a feedback path from the Observed region to the Active region?

  并行断言执行成功还是失败是在reactive region完成的，不是observe region，这是因为并行断言被严格地当作monitor来看待，因此它们不允许去改变设计的状态，也正如此，并行断言不应该去反馈active region的事件，为什么还会存在反馈路径？

  答案：这条反馈路径是expect提供的

• trigger clocking blocks， 在input skew #n step 之前采样

• input #0 skew：输入信号会在clocking event发生的时刻取样，在observed region取样。

• output #0 skew：输出信号会在clocking event发生的时刻驱动，在Re-NBA regin驱动。

Reactive region set

包含了

• Reactive Events Region
• Re-Inactive Region
• Re-NBA Region

Reactive Events Region in Reactive region set

主要内容：

• Execute all program blocking assignments.
• Execute the pass/fail code from concurrent assertions.
• Evaluate the Right-Hand-Side (RHS) of all program nonblocking assignments and schedule updates into the Re-NBA region.
• Execute all program continuous assignments
• Execute the $exit and implicit $exit commands.

说明：

• 主要用于执行program blocks 中生成的验证进程，因为reactive region在time slot的最后部分，所以一个线程在仿真执行的过程中获得以下关键信息（从前面的region中获得）：

  • The current set of steady-state Active region set values at the start of the current time slot. time slot开始的时候 active region set 设置值
  • The next set of steady-state Active region set values, after clock and signal propagation.
  • The disposition of all concurrent assertions triggered in this time slot.

• 在reactive region中执行的进程通常会 drive back 激励给设计部分

Re-Inactive Events Region in Reactive region set

• Events are scheduled into the Re-Inactive region by executing a #0 in a program process.

  事件被调度至Re-Inactive区中，当在program进程中执行#0延时的时候

  例如，fork join none语句中

  program test;
  	initial begin
  		fork
  			process1;
  			process2;
  			process3;
  		join_none
  		
  		#0
  			// parent process continues
  	end
  endprogram
  

  添加这个#0的意思是，在执行#0时，子线程（process1，process2，process3）进入Re- Inactive区中执行。（这个跟IEEE标准中规定的 Fork joinnone要求时一样，fork joinnone中spawn出的子线程要求在父线程执行到第一个阻塞语句后才开始执行）

Re-NBA Events Region in Reactive region set

• 跟active区的NBA区是对应关系，负责program中的非阻塞赋值，将RHS赋值给LHS

反馈路径有两条

• As currently defined, the Re-NBA region iterates with the Reactive and Re-Inactive regions until all Reactive region set events have completed.

  Re-NBA区可以重新再迭代会Reactive region和Re-Inactive region中

• if program execution scheduled any Reactive region events that could trigger Active region set events in the same time slot, the Active set regions (Active-Inactive-NBA) will re-trigger and iterate until the Active region set events have completed.

  除此以外，还可以反馈至RTL部分的Active region中

Postponed Region

• 这个region的主要功能是执行\(strobe和\)monitor命令，显示当前time slot的最终更新值。这个区域也被用来收集功能覆盖率。

• $strobe 和 $display的区别就在于此

  module tb;
  	initial begin
  		reg [7:0] a,b;
  		
  		a = 8'h2d;
  		b = 8'h2d;
  		
  		#10;
  		b <= a + 1;	// run in NBA region
  		
  		$display("[$display] time = %0t a = 0x%0h b = 0x%0h", $time, a, b); // run in active region
  		$strobe("[$strobe] time = %0t a = 0x%0h b = 0x%0h", $time, a, b); // run in postponed region
  		
  		#1;
  		// new time slot
  		$display("[$display] time = %0t a = 0x%0h b = 0x%0h", $time, a, b);
  		$strobe("[$strobe] time = %0t a = 0x%0h b = 0x%0h", $time, a, b);
  	end
  endmodule
  

  • There is no feedback path from the Postponed region back into the RTL or Reactive-loop regions, so the values displayed and the coverage collected will be the final values for that time slot.

    postponed区没有反馈路径，反映的值就是当前time slot最后的值