modelsim PE DE SE的区别及一些配套工具

The combination of industry-leading performance and capacity with the best integrated debug and analysis environment makes ModelSim the simulator of choice for both ASIC and FPGA design. Combining single kernel simulator (SKS) technology with a unified debug environment for VHDL, Verilog, SystemVerilog, and SystemC makes ModelSim the world’s most widely used simulator. The ModelSim product range includes ModelSim PE, DE & SE covering the complete range of requirements from small FPGA designs through to the largest System on Chip (SoC) devices. As for Modelsin XE (for Xilinx), it is out of date.

ModelSim PE (Personal Edition) is the industry-leading, Windows-based simulator for VHDL, Verilog, or mixed-language simulation environments offering a very cost effective solution for RTL and gate level simulation; 

ModelSim DE (Deluxe Edition) includes full PE functionality plus PSL & System Verilog assertions, Code Coverage,  Enhanced Dataflow, Waveform Compare, and support for Xilinx SecureIP as standard; 

ModelSim SE (System Edition) combines high performance and high capacity with the code coverage and debugging capabilities required to simulate larger blocks and systems and attain ASIC gate-level sign-off. ModelSim SE offers the ability to simulate very large designs.

 

一些配套的工具

Waveform Compare 

The Waveform Compare feature compares the results of two simulations in order to identify design errors. Waveform Compare is completely configurable offering continuous compares, clocked compares, and even create complex compares using ModelSim's virtual signal capabilities. Waveform Compare results can be viewed in a display window or captured in text files. 

Included with ModelSim SE & DE. Cost option for PE. 

 

Code Coverage 

ModelSim code coverage analysis offers an easy-to-use, integrated code coverage capability that helps develop more complete, robust testbenches quickly. Coverage types supported include statement coverage, branch coverage, condition coverage, branch coverage & finite state machine coverage. 

Included with ModelSim SE & DE. Cost option for PE.

 

Xilinx SecureIP interface (Replaces SWIFT Interface)

The ModelSim SecureIP option allows simulation of Xilinx encrypted IP cores. The SecureIP interface offers vastly greater simulation performance over the instantiation of these cores as gate level netlists.

Included with ModelSim SE & DE. Cost option for PE.

Free upgrade to SecureIP for customers with the older SWIFT interface module under maintenance