add2

In this exercise, you will create a circuit with two levels of hierarchy. Your will instantiate two copies of (provided), each of which will instantiate 16 copies of (which you must write). Thus, you must write two modules: and . top_moduleadd16add1top_moduleadd1

Like module_add, you are given a module that performs a 16-bit addition. You must instantiate two of them to create a 32-bit adder. One module computes the lower 16 bits of the addition result, while the second module computes the upper 16 bits of the result. Your 32-bit adder does not need to handle carry-in (assume 0) or carry-out (ignored). add16add16add16

Connect the modules together as shown in the diagram below. The provided module has the following declaration: add16add16

module add16 ( input[15:0] a, input[15:0] b, input cin, output[15:0] sum, output cout );

Within each , 16 full adders (module , not provided) are instantiated to actually perform the addition. You must write the full adder module that has the following declaration: add16add1

module add1 ( input a, input b, input cin, output sum, output cout );

Recall that a full adder computes the sum and carry-out of a+b+cin.

In summary, there are three modules in this design:

top_module — Your top-level module that contains two of...
add16, provided — A 16-bit adder module that is composed of 16 of...
add1 — A 1-bit full adder module.

If your submission is missing a , you will get an error message that says . module add1Error (12006): Node instance "user_fadd[0].a1" instantiates undefined entity "add1"

Module fadd - HDLBits (01xz.net)

 

module top_module (
    input [31:0] a,
    input [31:0] b,
    output [31:0] sum
);
wire cout1,cout2;
    add16 add16_lower(   //先定义低位的16位加法器
        .a(a[15:0]),
        .b(b[15:0]),   /*这个地方没有写错吗？图标上写的不是将[31:16]
        导入低层加法器当中吗*/
        .cin(1'b0),  /*总是在这里报错
        报错(10170):Verilog HDL语法错误在top module.v(17)附近的文本:`。
        检查并修复紧接在指定关键字之前或位置出现的任何语法错误。原写法.cin(1'b0), ，
        查出问题来了，不是在此处，而是因为21行对应的逗号的中英文输入法打错了，连带着出错*/
        .sum(sum[15:0]),
        .cout(cout1)
    );
    add16 add16_higher(
        .a(a[31:16]),
        .b(b[31:16]),
        .cin(cout1),   //这里的定义不太清楚，为什么是直接用cout1就解决了
        .sum(sum[31:16]),
        .cout(cout2)   //这里的定义也不太清楚，需要再看
    );
endmodule   /*重新在此写endmodule是否类似于C语言中的某一程序片段的终结，在这部分
定义了两个大的整体，再在下面定义晓得add1全加器部分*/

module add1 ( input a, input b, input cin,   output sum, output cout );
// Full adder module here
    assign sum=a^b^cin;
    //assign cout=(a&b)|(cin&b)|(cin&a);   /*这个就是全加器的逻辑运算公式了，*/
    /*因为全加器的书写方式有好几种，依次试验一下*/
    assign cout=a&b|(a^b)&cin;    /*这样就可以运行了，是正确的，但是如果改为
    cout=a&b+(a^b)&cin则最终结果不正确，二刷时再研究一下具体原因*/
endmodule