随笔分类 -  NVM_Express_Revision_1.3

NVM_Express_Revision_1.3
5.11 Firmware Commit command
摘要：5.11 Firmware Commit commandNOTE: This command was known in NVM Express revision 1.0 and 1.1 as “Firmware Activate.”The Firmware Commit command is use 阅读全文
posted @ 2020-04-14 20:10 话说吴语 阅读(1218) 评论(1) 推荐(0)
5.7 Doorbell Buffer Config command
摘要：5.7 Doorbell Buffer Config commandThe Doorbell Buffer Config command is used to provide two separate memory buffers that mirror the controller's doorb 阅读全文
posted @ 2020-04-14 20:05 话说吴语 阅读(1287) 评论(0) 推荐(0)
5.3 Create I/O Completion Queue command
摘要：5.3 Create I/O Completion Queue commandThe Create I/O Completion Queue command is used to create all I/O Completion Queues with the exception of the A 阅读全文
posted @ 2020-04-14 19:35 话说吴语 阅读(794) 评论(0) 推荐(0)
5.2 Asynchronous Event Request command
摘要：5.2 Asynchronous Event Request commandAsynchronous events are used to notify host software of status, error, and health information as these events oc 阅读全文
posted @ 2020-04-10 09:39 话说吴语 阅读(774) 评论(0) 推荐(0)
5 Admin Command Set
摘要：5 Admin Command SetThe Admin Command Set defines the commands that may be submitted to the Admin Submission Queue.The Submission Queue Entry (SQE) str 阅读全文
posted @ 2020-04-10 09:32 话说吴语 阅读(620) 评论(0) 推荐(0)
4.11 Command Arbitration
摘要：4.11 Command ArbitrationFor NVMe over PCIe, a command is submitted to the controller when a Submission Queue Tail Doorbell write by the host moves the 阅读全文
posted @ 2020-04-09 20:29 话说吴语 阅读(902) 评论(0) 推荐(0)
4.7 Controller Memory Buffer
摘要：4.7 Controller Memory BufferThe Controller Memory Buffer (CMB) is a region of general purpose read/write memory on the controller that may be used for 阅读全文
posted @ 2020-04-09 20:25 话说吴语 阅读(1040) 评论(0) 推荐(1)
4.5 Metadata Region (MR)
摘要：4.5 Metadata Region (MR)Metadata may be supported for a namespace as either part of the logical block (creating an extended logical block which is a l 阅读全文
posted @ 2020-04-09 20:19 话说吴语 阅读(591) 评论(0) 推荐(0)
4.4 Scatter Gather List (SGL)
摘要：4.4 Scatter Gather List (SGL)A Scatter Gather List (SGL) is a data structure in memory address space used to describe a data buffer. The controller in 阅读全文
posted @ 2020-04-09 20:04 话说吴语 阅读(3313) 评论(0) 推荐(0)
4.2 Submission Queue Entry – Command Format
摘要：4.2 Submission Queue Entry – Command FormatEach command is 64 bytes in size.Command Dword 0, Namespace Identifier, Metadata Pointer, PRP Entry 1, PRP 阅读全文
posted @ 2020-04-09 19:37 话说吴语 阅读(1615) 评论(0) 推荐(0)
4 Data Structures
摘要：4 Data StructuresThis section describes data structures used by NVM Express.4.1 Submission Queue & Completion Queue DefinitionSections 4.1, 4.1.1 and 阅读全文
posted @ 2020-04-08 19:51 话说吴语 阅读(693) 评论(0) 推荐(0)
3 Controller Registers
摘要：Controller registers are located in the MLBAR/MUBAR registers (PCI BAR0 and BAR1) that shall be mapped to a memory space that supports in-order access 阅读全文
posted @ 2020-04-08 19:43 话说吴语 阅读(477) 评论(0) 推荐(0)
2.6 Advanced Error Reporting Capability (Optional)
摘要：2.6 Advanced Error Reporting Capability (Optional)The Advanced Error Reporting definitions below are based on the PCI Express 2.1 Base specification. 阅读全文
posted @ 2020-04-08 16:01 话说吴语 阅读(2638) 评论(0) 推荐(0)
2.5 PCI Express Capability
摘要：The PCI Express Capability definitions below are based on the PCI Express 2.1 Base specification. Implementations may choose to base the device on a s 阅读全文
posted @ 2020-04-08 15:52 话说吴语 阅读(1407) 评论(0) 推荐(0)
2.2 PCI Power Management Capabilities
摘要：Note: It is recommended that the controller allocate a unique MSI-X vector for each Completion Queue.The Table BIR and PBA BIR data structures may be 阅读全文
posted @ 2020-04-08 15:45 话说吴语 阅读(756) 评论(0) 推荐(0)
2.1 PCI Header
摘要：NOTE: NVM Express implementations that reside behind PCI compliant bridges, such as PCI Express Endpoints, are restricted to having 32-bit assigned ba 阅读全文
posted @ 2020-03-30 20:28 话说吴语 阅读(1034) 评论(0) 推荐(0)
2 System Bus (PCI Express) Registers
摘要：This section describes the PCI Express register values when the PCI Express is the system bus used. Other system buses may be used in an implementatio 阅读全文
posted @ 2020-03-30 20:19 话说吴语 阅读(571) 评论(0) 推荐(0)
1 Introduction（一）
摘要：1 Introduction1.1 OverviewNVM Express (NVMe) is an interface that allows host software to communicate with a non-volatile memory subsystem. This inter 阅读全文
posted @ 2020-03-30 19:53 话说吴语 阅读(993) 评论(0) 推荐(0)