Common Issues in constructing UPF

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The following are world examples of issues with defining UPF…

Example #1

What two things are wrong with this PST?

	TOP	PD1 supply pre-switch	PD1 supply	VSS
FullOn	0.6	1.0	1.0	OFF
PwrSave	0.6	0.8	0.8	OFF
Hibemate	0.6	0.8	0.0	OFF

 

Example #2

What’s wrong with this picture?

 

Example #3

 

n  Given the following power intent diagram and output from report_lib –pg for the low-to-high LS liberary cell

 

n  With the following level shifter stratege work, assuming both power supplies are available in both domains?

set_level_shifter L2H –domain PD_B –rule low_to_high –applies_to inputs –location parent

Example #4

Given the following power intent diagram and output from report_lib –pg for the low-to-high ELS library cell

 

 

With the following LS and ISO strategies infer ELS cells on the inputs to PD_B?

set_level_shifter L2H –domain PD_B –rule low_to high –applies_to inputs –location self

set_isolation ISO_PDB –domain PD_B –clamp_value 1 –applies_to inputs

set_isolation_control ISO_PDB –domain PD_B –location self –isolation_sense low –isolation_signal pd2_isolatie

Example #5

What’s wrong with this UPF?

create_power_domain PD1 –elements {U1}

add power_state pd1.primary -state PD1_OFF –logic_expr {sw_ctrl} –supply_expr {power == `{OFF} –simstate CORRUPT

create_supply_net VDD

create_supply_port VDD

connect_supply_net VDD –ports VDD

create_supply_net VDD_SW

create_supply_set PD1.primary –function {power VDD_SW} –update

create_power_switch SWITCH –output_supply_port {vout VDD_SW} –input_supply_port {vin VDD} –control_port {ctrl sw_ctrl} –off_state {swoff !ctrl}

Example #6

 

 

What about the isolation strategy shown here for LEON2_p3 will make it difficult to implement?

Answers

Example #1 Answer:

	TOP	PD1 supply pre-switch	PD1 supply	VSS
FullOn	0.6	1.0	1.0	0.0V
PwrSave	0.6	0.8	0.8	0.0V
Hibemate	0.6	0.8	OFF	0.0V

 

n  VSS supply values should be 0.0V, not “OFF”

n  Values for PD1 supply in shutdown state “Hibernate” should be “OFF”, not 0.0V

Example #2 Answer:

 

 

 

Example #3 Answer:

NO: If the primary power of domain PD_A is at 0.8V, then the primary power pin of LS (with the std_cell_main_rail attribute) must also be 0.8V

Solution: change level shifter strategy to use “-location self”

Example #4 Answer:

NO: Even though scmr is same voltage as PD_B primary supply, the primary supply for PD_B isn’t always on.

Example #5 Answer: 

 

Answer: The sense level of the switch control signal doesn’t match in these commands.

Example #6 Answer:

Isolation control signal is AO inside this domain and must be level shifted inside this domain.

 

Debugging commands in DC and ICC

check_mv_design checks multi-voltage constraints, isolation requirements, and connection rules; use the to determine if you have UPF-related failures/errors

analyze_mv_design analyzeds multi-voltage design connections; use this to understand why LS and AO cells are not being inserted.

report_lib –pg_pin reports pg_pin information for a library and its cells; use this to understand the properties of your special cells

report_mv_library_cells reports all of the LS/ISO/RR/AO cells available for a given library; use this to understand what cells you have to work with

Debugging commands in MVRC

check_protection –critique analyzes validity of UPF, assuming PST is golden; checks for missing/incorrect strategies bassed on what’s defined in PST

-- Can be used for RTL+UPF and netlist+UPF analysis

-- Use –no_design_checks option for RTL+UPF analysis

check _protection-intent considers all of UPF as golden, and validates that what is implemented in design matches power intent defined in UPF (consistency check)

check_architecture –signal_corruption reports vilations in UPF architecture, specifically with respect to critical signals such as MV control signals, clocks, resets

check_design [ -rtl | -netlist | -pgnetlist] metacommand that executes essential checking commands at the corresponding stage of design’s implementation