CY22393的应用。
第一步:
用CyclocksRT 软件设置好需要产生的频率等参数。生成配置文件。
第二步:
用CY3672(编程器)+CY3672ADP003(IC 座)将配置文件烧录。或用第三方烧录器如河洛等烧录。
最后焊接到板子上就可以应用了。
原理图连接:
Pin16 --VCC(或IO 控制),Pin15(S2)---GND,Pin12/Pin13--I2C线上拉。
如下为调试成功的I2C 控制
/*
CY22393
*/
#define CY22393_ADDR 0x69
#define CY22393_I2C_ADDR  CY22393_ADDR
#define CY22393_PLL_ENABLE  0x40 //bit6
//#define CY22393_PLL_DISABLE  10111111B //0xBF//bit6
#define CY22393_PLL_DISABLE  0xBF //0xBF//bit6
//REG
#define CY22393_REG_CLKA_DIVIDE  0x08 //divsel:0
//#define CY22393_REG_CLKA_DIVIDE  0x09 //divsel:1
#define CY22393_REG_CLKB_DIVIDE  0x0A //divsel:0
//#define CY22393_REG_CLKB_DIVIDE  0x0B //divsel:1
#define CY22393_REG_CLKD_DIVIDE  0x0D //
#define CY22393_REG_DIVIDE 0x0C //CLKC
#define CY22393_REG_SOURCE 0x0E
#define CY22393_REG_PLLP    0x4A
#define CY22393_REG_PLLQ    0x49
#define CY22393_REG_PLLE    0x4B
#define CY22393_REG_PLLP0    0x41
#define CY22393_REG_PLLQ0    0x40
#define CY22393_REG_PLLE0    0x42
#define CY22393_REG_PLLP1    0x44
#define CY22393_REG_PLLQ1    0x43
#define CY22393_REG_PLLE1    0x45
#define CY22393_REG_PLLP2    0x47
#define CY22393_REG_PLLQ2    0x46
#define CY22393_REG_PLLE2    0x48
#define CY22393_REG_AC    0x0F
#define CY22393_REG_DC    0x10
#define CY22393_REG_PLL2P    0x12
#define CY22393_REG_PLL2Q    0x11
#define CY22393_REG_PLL2E    0x13
//Data
#define CY22393_PLLE_200M_200K   0x58
#define CY22393_PLL2E_200M_200K   0x40
#define CY22393_SOURCE_PLL    0x55 //DCBA PLL1:01
#define CY22393_SOURCE_REF    0x45 //DCBA ref:00
#define CY22393_SOURCE_REF    0x45 //DCBA ref:00
#define CY22393_SOURCE_PLL2    0x65 //DCBA PLL2:10
#define CY22393_AC    0x55
#define CY22393_DC    0x55
//divide
#define CY22393_DIVIDE_200M  2
#define CY22393_DIVIDE_100M  4
#define CY22393_DIVIDE_80M   5
#define CY22393_DIVIDE_40M   10
#define CY22393_DIVIDE_20M   1
#define CY22393_DIVIDE_8M   25//41
#define CY22393_DIVIDE_4M   5
#define CY22393_DIVIDE_2M   10
#define CY22393_DIVIDE_800K   25
#define CY22393_DIVIDE_400K    50
#define CY22393_DIVIDE_200K    100
#define CY22393_DIVIDE_OFF 00//close clk ouput
//P
#define CY22393_PLLP_200M  40
#define CY22393_PLLP_100M  40
#define CY22393_PLLP_80M   40
#define CY22393_PLLP_40M   40
#define CY22393_PLLP_20M   0
#define CY22393_PLLP_8M   7//82
#define CY22393_PLLP_4M   0
#define CY22393_PLLP_2M   0
#define CY22393_PLLP_800K   0
#define CY22393_PLLP_400K    0
#define CY22393_PLLP_200K    0
//Q
#define CY22393_PLLQ_200M  2
#define CY22393_PLLQ_100M  2
#define CY22393_PLLQ_80M   2
#define CY22393_PLLQ_40M   2
#define CY22393_PLLQ_20M   0
#define CY22393_PLLQ_8M   0//5
#define CY22393_PLLQ_4M   0
#define CY22393_PLLQ_2M   0
#define CY22393_PLLQ_800K   0
#define CY22393_PLLQ_400K    0
#define CY22393_PLLQ_200K    0
void CY22393Init(void)   
{  
//#if 1
    // set dividers to default    
 CY22393WriteReg(CY22393_REG_PLLE, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE0, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE1, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE2, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 //CLK output OFF
 CY22393WriteReg(CY22393_REG_CLKA_DIVIDE,CY22393_DIVIDE_OFF);  
 CY22393WriteReg(CY22393_REG_CLKB_DIVIDE,CY22393_DIVIDE_OFF);  
 CY22393WriteReg(CY22393_REG_CLKD_DIVIDE,CY22393_DIVIDE_OFF);
    //CLKC
   // CY22393WriteReg(CY22393_REG_DIVIDE,CY22393_DIVIDE_2M);  
    CY22393WriteReg(CY22393_REG_DIVIDE,CY22393_DIVIDE_OFF);   
    CY22393WriteReg(CY22393_REG_SOURCE, CY22393_SOURCE_REF);   
    CY22393WriteReg(CY22393_REG_AC, CY22393_AC);     
    CY22393WriteReg(CY22393_REG_DC, CY22393_DC);   
    //
 CY22393WriteReg(CY22393_REG_PLLP, CY22393_PLLP_2M);  
 CY22393WriteReg(CY22393_REG_PLLQ, CY22393_PLLQ_2M);  
 CY22393WriteReg(CY22393_REG_PLLE, CY22393_PLLE_200M_200K);  
//#endif  
}
void CY22393SetFreq(u8 divide,u8 source,u8 PLLP,u8 PLLQ)
{
//#if 1
 // set dividers to default    
 CY22393WriteReg(CY22393_REG_PLLE, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE0, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE1, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLLE2, CY22393_PLLE_200M_200K&CY22393_PLL_DISABLE);  
 CY22393WriteReg(CY22393_REG_PLL2E, CY22393_PLL2E_200M_200K&CY22393_PLL_DISABLE);
 //CLK output OFF
 CY22393WriteReg(CY22393_REG_CLKA_DIVIDE,CY22393_DIVIDE_OFF);  
 CY22393WriteReg(CY22393_REG_CLKB_DIVIDE,CY22393_DIVIDE_OFF);  
 CY22393WriteReg(CY22393_REG_CLKD_DIVIDE,CY22393_DIVIDE_OFF);
    //CLKC
    CY22393WriteReg(CY22393_REG_DIVIDE,divide);   
    CY22393WriteReg(CY22393_REG_SOURCE, source);   
    CY22393WriteReg(CY22393_REG_AC, CY22393_AC);     
    CY22393WriteReg(CY22393_REG_DC, CY22393_DC);   
    //
 //if(divide==CY22393_DIVIDE_8M)
 if(PLLP==CY22393_PLLP_8M)  
 {
  CY22393WriteReg(CY22393_REG_PLL2P, PLLP);  
  CY22393WriteReg(CY22393_REG_PLL2Q, PLLQ);  
  CY22393WriteReg(CY22393_REG_PLL2E, CY22393_PLL2E_200M_200K);
 }
 else
 {
  CY22393WriteReg(CY22393_REG_PLLP, PLLP);  
  CY22393WriteReg(CY22393_REG_PLLQ, PLLQ);  
  CY22393WriteReg(CY22393_REG_PLLE, CY22393_PLLE_200M_200K);
 }
//#endif 
}
void CY22393WriteReg(u8 addr, u8 data)   
{   
    u8 packet[2];   
    // prepare write packet    
    packet[0] = addr;   
    packet[1] = data;   
    // write to device      
    I2cMasterSend(CY22393_I2C_ADDR, 2, packet);   
}  
void I2cMasterSend(uint8_t RegAddr,uint8_t num,uint8_t *pData)
{
 uint8_t i;
 
 RegAddr <<= 1;//device addr:D6~D0,R/W
 
    fnI2CStart();
 
    fnI2CWriteData(RegAddr); //device addr:D6~D0,R/W
 
   for(i=0;i<num;i++)
   {
    fnI2CWriteData((uint8_t)(*(pData+i)));//reg addr/reg data
   }
 
   fnI2CStop();
}
void fnI2CStart(void)
{
 GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_SetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT); 
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
}
void fnI2CStop(void)
{
 GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT); 
 GPIO_SetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
}
void fnI2CWriteData(uint8_t nData)
{
 unsigned char i;
 unsigned char nBit;
 nBit = 0x80;
   for (i = 0; i < 8; i++)
   {
    // Prepare data.
      if (nData & nBit)
      {
       GPIO_SetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
      }
      else
      {
          GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);
}
  // Toggle clock.
      GPIO_ResetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
      GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
      GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
      GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
      GPIO_ResetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
      nBit >>= 1;
    }
 /*ACK*/
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SDAT,GPIO_PIN_CYPRESS_SDAT);//ACK:"0"
 
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_SetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
 GPIO_ResetBits(GPIO_PORT_CYPRESS_SCLK,GPIO_PIN_CYPRESS_SCLK);
}
 
                     
                    
                 
                    
                 
         
                
            
         浙公网安备 33010602011771号
浙公网安备 33010602011771号