2021年12月24日
A PCI Express to PCIX Bridge optimized for performance and area
摘要： https://dspace.mit.edu/handle/1721.1/16674 The core is approximately 27K gate count, runs at a maximum of 250 MHz, and is synthesized to a current sta 阅读全文
posted @ 2021-12-24 21:12 华容道专家 阅读(64) 评论(0) 推荐(0)
在线卡诺图
摘要： Karnaugh Map Solver (charlie-coleman.com) 最多10个变量，有js源码. 在右下角表里点，f会变。 class Petrick { constructor(minterms, maxterms, dontCares, dimension, variableNa 阅读全文
posted @ 2021-12-24 20:21 华容道专家 阅读(6761) 评论(0) 推荐(1)
Verilog code for D flip-flop – All modeling styles
摘要： 我这个第一个对，第二个不对: module flipflop(output q, q_, input set, enable, reset); wire er, es; and g1(er, enable, reset), g2(es, enable, set); nor g3(q, er, q_) 阅读全文
posted @ 2021-12-24 18:20 华容道专家 阅读(166) 评论(0) 推荐(0)
Verilog之[-2]贴
摘要： 改编自Deepak Kumar Tala@www.asic-world.com和Shubham Singh的Verilog Fundamentals@csg.csail.mit.edu/6.375等。参考资料下载 3MB 面包板(Bread Board)和印刷电路板(Printed Circuit 阅读全文
posted @ 2021-12-24 16:21 华容道专家 阅读(79) 评论(0) 推荐(0)
试用Verilog中的=, <=和assign
摘要： 用错assign的一个例子@博客园 .v: module my_circuit(output reg[7:0] c, input wire[7:0] a, b); // Remove/change 'reg' and 'wire' to see error messages like who can 阅读全文
posted @ 2021-12-24 13:33 华容道专家 阅读(342) 评论(0) 推荐(0)
affiliate
摘要： 近义词: ally, amalgamate, annex, band together, combine, confederate, connect, incorporate, link http://www.freethesaurus.com/affiliate The High School A 阅读全文
posted @ 2021-12-24 09:12 华容道专家 阅读(411) 评论(0) 推荐(0)
A Child's History of England.63
摘要： As the King his father had sent entreaties [请求] to him to return home, he now began the journey. He had got as far as Italy, when he met messengers wh 阅读全文
posted @ 2021-12-24 08:51 华容道专家 阅读(46) 评论(0) 推荐(0)