DDR SDRAM

Double Data Rate Synchronous Dynamic Random-Access Memory, officially abbreviated as DDR SDRAM, is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, DDR4 SDRAM and DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work in DDR1-equipped motherboards, and vice versa. Compared to single data rate (SDR) SDRAM, the DDR SDRAM interface makes higher transfer rates possible by more strict control of the timing of the electrical data and clock signals.

LPDDR means Low-Power, Double-Data-Rate. MDDR is an acronym that some enterprises use for Mobile DDR SDRAM, a type of memory used in some portable electronic devices, like mobile phones, handhelds, and digital audio players. Through techniques including reduced voltage supply and advanced refresh options, Mobile DDR can achieve greater power efficiency.

With data being transferred 64 bits at a time, DDR SDRAM gives a transfer rate (in bytes/s) of (memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus, with a bus frequency of 100 MHz, DDR SDRAM gives a maximum transfer rate of 1600 MB/s.

• 2000, DDR-266, 133 MHz, 2133 MB/s
• 2003, DDR2-1066, 533.5 MHz, 8533.5 MB/s
• 2007, DDR3-1600, 800 MHz, 12800 MB/s
• 2014, DDR4-2666, 1333.5 MHz, 21333.5 MB/s
• 2020, DDR5-3200, 3600 ... 6400，估计要到2020 + 2022 - 2014 = 2028才能普遍用上

Back when the 6502 was introduced, RAM was actually faster than microprocessors, so it made sense to optimize for RAM access rather than increase the number of registers on a chip. It also had a lower gate count (and cost) than its competitors.

一条指令4个字节的话，21333.5 MB/s / 4 = 5.3GI/s = 53亿条指令/秒 好比 5G主频+每条指令一个时钟周期。程序和数据有局部性。目前非超算多个CPU和它们的核共享内存。内存带CPU听起来诡异，CPU内置内存则8051就有了，不考虑仅128字节及其它因素，反正是在一起了。:-) 哈佛架构代码和数据放在不同的内存里，冯诺依曼则放在一起。现在是大数据时代而不是大代码时代，万亿参数的程序并不算大。JIT等技术要在程序运行时改指令，Java真可恨 :-)。Cache有多级。许多CPU分指令I-Cache和数据D-Cache. Cache好像既可以对物理地址，也可以对虚拟地址。OS和C运行库的代码运行频率高。