Material Design

A Brief Introduction to Verilog by Sat Garcia  Verilog Tutorial@riptutorial.com

 

Ways To Use Verilog:

• Structural/Lower Level has all the details in it (which gates to use, etc), always synthesizable
• Functional/Higher Level, easier to write, not always synthesizable

RTL有两个不同的含义: In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those signals.

Resistor–transistor logic (RTL) is a class of digital circuits built using resistors as the input network and bipolar junction transistors (BJTs) as switching devices. RTL is the earliest class of transistorized digital logic circuit used; other classes include diode–transistor logic (DTL) and transistor–transistor logic (TTL).

   

为啥不画个方框，里面写上AND, &之类，要这么花哨？花得过这个不？

Material Design Lite, 简洁惊艳的前端工具箱 博客园: 拟真和扁平是两个极端，Material Design偏扁平。

A xor B = not(A and B) and (A or B). 这个比用xor交换两个变量高档和实用。或者面试时问: There is a story about certain military devices being designed using only NAND gates, so that only one part needs to be certified, stocked as spares, etc. Is there a ha-ha point? If so, what's it?