Makefile文件编写

 

a slightly more generic simple makefile

#the compiler: gcc for C program, define as g++ for C++

CC=gcc

#compiler flags:

#-g  adds debugging information to the executable file.

#-Wall compiler warning.

CFLAGS=-g -Wall

#the build target executable:

TARGET=myprog

all: $(TARGET)

$(TARGET): $(TARGET).c

                  $(CC) $(CFLAGS) $(TARGET).c  -o $(TARGET)

clean:

　　　　　　 $(RM)  $(TARGET)

 

 

 

(2) an example of building an executable from multiple .o files:

CC=g++

CFLAGS=-g -Wall

all: count

count: countwords.o counter.o scanner.o

          $(CC) $(CFLAGS)  countwords.o counter.o scanner.o  -o count

countwords.o: countwords.c scanner.h counter.h

          $(CC) $(CFLAGS) -c counterwords.c

counter.o: count.c  counter.h

          $(CC) $(CFLAGS) -c counter.c

scanner.o: scanner.c  scanner.h

          $(CC) $(CFLAGS) -c scanner.c

#to start over from scatch, type 'make clean'. This removes the executable file, as well as old  .o object files and *~ backup files.

clean:

         $(RM) count *.o *~