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随笔分类 -  Architecture

摘要:1. PCI Express the Root Complex plays the role that used to be played by the Memory Control Hub(MCH), or the North Bridge. It also incorporates te system memory controller (rather than residing the sy... 阅读全文

posted @ 2005-05-27 15:51 bullfinch 阅读(512) 评论(0) 推荐(0)

摘要:Tabe 1 The Pentium 4 Roadmap (Description omitted) Code Name Date The Pentium 4 Processor Willamette 11/20/00 Northwood 01/07/02 Northwood B with Hyper-Threading 11/14/02 Northw... 阅读全文

posted @ 2005-05-27 14:19 bullfinch 阅读(428) 评论(0) 推荐(0)

摘要:1. All IA32 processors up to and including the Pentium processor use variable length(1~15bytes) instructions, all IA32 processors starting with the Pentium Pro translate the IA32 instructions into pr... 阅读全文

posted @ 2005-05-27 13:52 bullfinch 阅读(621) 评论(0) 推荐(0)

摘要:1. The Pentium processor address bus consits of two sets of signal lines: the address bus proper, consisting of 29 signal lines designated A31:A3. the Byte Enable bus, consisting of the 8 signal line... 阅读全文

posted @ 2005-05-15 23:34 bullfinch 阅读(833) 评论(0) 推荐(0)

摘要:Single Processor MESI Implementation: Initial Read from System Memory: (II)[SE] L2-E L2-WB/WT#=0 L1-S First Write to the Internal Cache Line: (SE)[EM] L2-M L2-WB/WT#=1 L1-E (Write-Onc... 阅读全文

posted @ 2005-05-15 17:56 bullfinch 阅读(682) 评论(0) 推荐(0)

摘要:1. Pentium Processor has two instruction pipelines: "u" pipeline and "v" pipeline, they can work parallel. 2. Pentium Processor has seperated data cache and code cache to eliminates internal contentio... 阅读全文

posted @ 2005-05-14 16:35 bullfinch 阅读(502) 评论(0) 推荐(0)

摘要:中午吃饭的时候听两个朋友讨论到现在AMD在某些产品线上CPU功耗和性能都要比Intel的好了,有点好奇,问了一下,说是访问内存方面做了改进,好像是把内存管理模块集成到了芯片里。 回来后就开始找资料,想看看到底是怎么一回事情。 先是上amd的网站,找到了一些AMD64 Architecture的manual,下载下来粗略看了目录,发现都是一些software develop manuals,没有关于... 阅读全文

posted @ 2005-05-12 19:19 bullfinch 阅读(387) 评论(0) 推荐(0)