HC32F488时钟切换为200MHZ例程

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/*****************************************************************************
Function:
Description: 外部低速晶振初始化
*****************************************************************************/
int32_t BSP_XTAL32_Init(void)
{
stc_clock_xtal32_init_t stcXtal32Init;
stc_fcm_init_t stcFcmInit;
uint32_t u32TimeOut = 0UL;
uint32_t u32Time = HCLK_VALUE / 5UL;

if (CLK_XTAL32_ON == READ_REG8(CM_CMU->XTAL32CR)) {
    /* Disable xtal32 */
    (void)CLK_Xtal32Cmd(DISABLE);
    /* Wait 5 * xtal32 cycle */
    DDL_DelayUS(160U);
}

/* Xtal32 config */
(void)CLK_Xtal32StructInit(&stcXtal32Init);
stcXtal32Init.u8State  = CLK_XTAL32_ON;
stcXtal32Init.u8Drv    = CLK_XTAL32_DRV_MID;
stcXtal32Init.u8Filter = CLK_XTAL32_FILTER_ALL_MD;
GPIO_AnalogCmd(GPIO_PORT_C, GPIO_PIN_14 | GPIO_PIN_15, ENABLE);
(void)CLK_Xtal32Init(&stcXtal32Init);

/* FCM config */
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_FCM, ENABLE);
(void)FCM_StructInit(&stcFcmInit);
stcFcmInit.u32RefClock       = FCM_REF_CLK_MRC;
stcFcmInit.u32RefClockDiv    = FCM_REF_CLK_DIV8192;
stcFcmInit.u32RefClockEdge   = FCM_REF_CLK_RISING;
stcFcmInit.u32TargetClock    = FCM_TARGET_CLK_XTAL32;
stcFcmInit.u32TargetClockDiv = FCM_TARGET_CLK_DIV1;
stcFcmInit.u16LowerLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 96UL / 100UL);
stcFcmInit.u16UpperLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 104UL / 100UL);
(void)FCM_Init(&stcFcmInit);
/* Enable FCM, to ensure xtal32 stable */
FCM_Cmd(ENABLE);
for (;;) 
{
    if (SET == FCM_GetStatus(FCM_FLAG_END)) 
    {
        FCM_ClearStatus(FCM_FLAG_END);
        if ((SET == FCM_GetStatus(FCM_FLAG_ERR)) || (SET == FCM_GetStatus(FCM_FLAG_OVF))) 
        {
            FCM_ClearStatus(FCM_FLAG_ERR | FCM_FLAG_OVF);
        } 
        else 
        {
            (void)FCM_DeInit();
            FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_FCM, DISABLE);
            return LL_OK;
        }
    }
    u32TimeOut++;
    if (u32TimeOut > u32Time) 
    {
        (void)FCM_DeInit();
        FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_FCM, DISABLE);
        return LL_ERR_TIMEOUT;
    }
}

}

/*****************************************************************************
Function:
Description: 外部高速晶振初始化
*****************************************************************************/
static void XtalInit(void)
{
stc_clock_xtal_init_t stcXtalInit;

/* XTAL config */
GPIO_AnalogCmd(GPIO_PORT_H, GPIO_PIN_00 | GPIO_PIN_01, ENABLE);
(void)CLK_XtalStructInit(&stcXtalInit);
/* Config Xtal and Enable Xtal */
stcXtalInit.u8State = CLK_XTAL_ON;
stcXtalInit.u8Mode  = CLK_XTAL_MD_OSC;          // 选择振荡器
stcXtalInit.u8Drv   = CLK_XTAL_DRV_HIGH;        // 选择驱动能力
stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;    // 选择振荡器稳定时间
(void)CLK_XtalInit(&stcXtalInit);

}

/*****************************************************************************
Function:
Description: PLL初始化
*****************************************************************************/
static void PLLHInit(void)
{
stc_clock_pll_init_t stcPLLHInit;

(void)CLK_PLLStructInit(&stcPLLHInit);
/* PLLH config */
/* 8MHz/M*N = 8/1*100/4 = 200MHz */
stcPLLHInit.PLLCFGR = 0UL;
stcPLLHInit.PLLCFGR_f.PLLM = (1UL  - 1UL);
stcPLLHInit.PLLCFGR_f.PLLN = (100UL - 1UL);
stcPLLHInit.PLLCFGR_f.PLLR = (4UL  - 1UL);
stcPLLHInit.PLLCFGR_f.PLLQ = (4UL  - 1UL);
stcPLLHInit.PLLCFGR_f.PLLP = (4UL  - 1UL);
stcPLLHInit.u8PLLState = CLK_PLL_ON;
stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
(void)CLK_PLLInit(&stcPLLHInit);

}

/*****************************************************************************
Function:
Description: 将系统时钟设置为200MHZ
*****************************************************************************/
void system_clk_init(void)
{
// Set bus clock div.
CLK_SetClockDiv(CLK_BUS_CLK_ALL, (CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 |
CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | CLK_HCLK_DIV1));
// flash read wait cycle setting
EFM_SetWaitCycle(EFM_WAIT_CYCLE3);
XtalInit();
PLLHInit();
// GPIO read wait cycle setting
GPIO_SetReadWaitCycle(GPIO_RD_WAIT3);
// switch driver ability
PWC_LowSpeedToHighSpeed();
// set PLL as systerm clock source
CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
}
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posted @ 2025-02-12 15:56  不惑而已  阅读(79)  评论(0)    收藏  举报