日常记录（14）VIM与数字逻辑公式

vim配置

在vimrc原配置的基础上。

gg=G 自动修正缩进

>G代码右缩进

<G代码左缩进

set nu
imap <S-[> <Esc>
autocmd CursorMoved * silent! exe printf('match Underlined /\<%s\>/', expand('<cword>'))
autocmd CursorHold * silent! exe printf('match Underlined /\<%s\>/', expand('<cword>'))
set mouse=a
autocmd vimenter * NERDTree

NEADTree的按键

https://yang3wei.github.io/blog/2013/01/29/nerdtree-kuai-jie-jian-ji-lu/

C 将选中目录或选中文件的父目录设为根结点

s vsplit 一个新窗口打开选中文件，并跳到该窗口

i split 一个新窗口打开选中文件，并跳到该窗口

仲裁器验证SystemVerilog

DUT部分

 1 module arb (arb_if.DUT arbif);
 2 
 3 parameter IDLE = 2, GRANT0 = 0, GRANT1 = 1;
 4 
 5 reg last_winner;
 6 reg winner;
 7 reg [1:0] next_grant;
 8 
 9 reg [1:0] state, nxState;
10 
11 always @(state or arbif.request or last_winner or arbif.grant)
12 begin
13     nxState = state;        // hold state by default  
14     winner = last_winner;    // hold its value 
15     next_grant = arbif.grant;
16 
17     case(state)
18         IDLE: begin
19             next_grant[0] = arbif.request[0] & ~(arbif.request[1] & ~last_winner);
20             next_grant[1] = arbif.request[1] & ~(arbif.request[0] &  last_winner);
21             if(next_grant[0])
22                 winner = 1'b0;
23             if(next_grant[1])
24                 winner = 1'b1;
25             if(next_grant[0] == 1'b1)
26                 nxState = GRANT0;
27             if(next_grant[1] == 1'b1)
28                 nxState = GRANT1;
29             if(next_grant[1:0] == 2'b11)
30                 $display("ERROR: two grants asserted simultaneously");
31         end      
32 
33         GRANT0: begin
34             if(~arbif.request[0]) begin
35                 next_grant[0] = 1'b0;
36                 nxState = IDLE;
37             end
38         end
39 
40         GRANT1: begin
41             if(~arbif.request[1]) begin
42                 next_grant[1] = 1'b0;
43                 nxState = IDLE;
44             end
45         end
46     endcase
47 end
48 
49 always @(posedge arbif.clk or posedge arbif.reset) begin
50     if (arbif.reset) begin
51         state <= IDLE;
52         last_winner <= 1'b0;
53         arbif.grant <= 2'b00;
54     end
55     else begin    
56         state <= nxState;
57         last_winner <= winner;
58         arbif.grant <= next_grant;
59     end
60 end
61 
62 endmodule

View Code

接口

 1 interface arb_if(input bit clk); 
 2   logic [1:0] grant, request; 
 3   logic reset; 
 4 
 5   clocking cb @(posedge clk); 
 6     output request; 
 7     input grant; 
 8   endclocking
 9 
10   modport TEST (clocking cb,
11                 output reset);
12 
13   modport DUT (input request, reset, clk,
14                output grant);
15 
16   modport MONITOR (input request, grant, reset, clk);
17 
18 endinterface

View Code

TB部分

 1 program automatic test (arb_if.TEST arbif);
 2 
 3     task reset_test();
 4     begin
 5       $display("Task reset_test: asserting and checking reset");
 6       arbif.reset <= 0;
 7       #100 arbif.reset <= 1;
 8       arbif.cb.request <= 0;
 9       repeat (2) @arbif.cb;
10       arbif.reset <= 0;
11       @arbif.cb;
12       a0: assert (arbif.cb.grant == 2'b00);
13       end
14     endtask
15 
16 
17     task request_grant_test();
18     $monitor("@%0d: grant=%b", $time, arbif.cb.grant);
19     
20     // Test out bit 0
21     $display("Task request_grant_test: asserting and checking reset");
22 
23     ##1 arbif.cb.request <= 2'b01;
24     $display("@%0d: Drove req=01", $time);
25     repeat (2) @arbif.cb;
26     a1: assert (arbif.cb.grant == 2'b01);
27 
28     ##1 arbif.cb.request <= 2'b00;
29     $display("@%0d: Drove req=00", $time);
30     repeat (2) @arbif.cb;
31     a2: assert (arbif.cb.grant == 2'b00);
32 
33     ##1 arbif.cb.request <= 2'b10;
34     $display("@%0d: Drove req=10", $time);
35     repeat (2) @arbif.cb;
36     a3: assert (arbif.cb.grant == 2'b10);
37 
38     ##1 arbif.cb.request <= 2'b00;
39     $display("@%0d: Drove req=00", $time);
40     repeat (2) @arbif.cb;
41     a4: assert (arbif.cb.grant == 2'b00);
42 
43     ##1 arbif.cb.request <= 2'b11;
44     $display("@%0d: Drove req=11", $time);
45     repeat (2) @arbif.cb;
46     a5: assert (arbif.cb.grant == 2'b01);
47 
48     ##1 arbif.cb.request <= 2'b00;
49     $display("@%0d: Drove req=00", $time);
50     repeat (2) @arbif.cb;
51     a6: assert (arbif.cb.grant == 2'b00);
52     endtask
53 
54 
55     initial begin
56       repeat (10) @arbif.cb;
57 
58       reset_test();
59 
60       request_grant_test();
61 
62       repeat (10) @arbif.cb;
63       $finish;
64 
65     end
66 endprogram

View Code

TOP部分

 1 `timescale 1ns/1ns
 2 
 3 module top;
 4   bit  clk;
 5   always #5 clk = !clk; 
 6 
 7   arb_if arbif(clk); 
 8   arb a1 (arbif);
 9   test t1(arbif);
10 
11 endmodule

View Code

Makefile部分

 1 FILES = top.sv arb.sv arb_if.sv test.sv
 2 FLAGS = -sverilog -debug_all
 3 
 4 run:    simv
 5     ./simv -l simv.log
 6 
 7 gui:    simv
 8     ./simv -gui
 9 
10 simv:    ${FILES}
11     vcs ${FLAGS} ${FILES}
12 
13 
14 DIR = $(shell basename `pwd`)
15 tar:    clean
16     cd ..;tar cvf ${DIR}.tar ${DIR}
17 
18 clean:     
19     @rm -rf csrc simv* *.tcl *.vpd .res* ucli* .ucli* *.old *.txt *.db 
20     @rm -rf *.log *~ */*~ .*/*~