Architecting Area

基于看书的小总结，方便自己未来查阅了。参考书籍为 Advanced FPGA design: architecture, implementation, and optimization

A topology that targets area is one that reuses the logic resources to the greatest exten possible, often at the expense of throughput(speed).

 

reset 对于area的影响:

不合适的reset strategy回带来不必要的large design 和inhibit certain area optimizations

DSP 和其他multifunction resources are typically not flexible to varying reset strategies

Improperly resetting a RAM can have catastrophic impact on the area

Using set and reset can prevent certain combinatorial logic ooptimizations

avoid using set or reset whenever possible when area is the key consideration