uvm中的uvm_root解析

uvm_top = uvm_root::type_id::create("top", null);
uvm_top= new("top", null);

uvm_test_top = my_casen::type_id::create("uvm_test_top", this);
uvm_test_top = new("uvm_test_top", this);

uvm_top.set_timeout = uvm_root::set_timeout；

uvm_config_db#(virtual my_if)::set(null, "uvm_test_top.env.i_agt.drv", "vif", input_if);
uvm_config_db#(virtual my_if)::set(uvm_root::get(), "uvm_test_top.env.i_agt.drv", "vif", input_if);

class uvm_root extends uvm_component;
// Get the factory singleton
extern static function uvm_root get();

extern virtual task run_test (string test_name="");

virtual function string get_type_name();
  return "uvm_root";
endfunction

extern function void print_topology  (uvm_printer printer=null);

// Variable: enable_print_topology
// If set, then the entire testbench topology is printed just after completion
// of the end_of_elaboration phase.
bit  enable_print_topology = 0;

// Variable: finish_on_completion
// If set, then run_test will call $finish after all phases are executed. 
bit  finish_on_completion = 1;

endclass

层次结构用句柄表示；
路径时用实例化时的名字表示；