SOC中load编译后的代码和通过uart打印出字符

导入编译后的代码到CPU中

module tb;
//将编译后的代码放入到cpu中
`ifndef GATE_SIM
initial begin
$readmemh("inf0_mem.txt",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.main_mem);
$readmemh("main_mem.txt",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.inf1_mem);
$readmemh("image.hex",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.main_mem);
$readmemh("sram.hex",tb.u0_chip.u0_digcore.u_digcore_func.u0_SRAM.U_SRAM_mbist_con.mbist_mcu_mem_sp_bist_JLRAMSAC1024X32C2V0_block_instance_0.JLRAMSAC1024X32C2V0_instance_0.mem);
end
`else
initial begin
$readmemh("inf0_mem.txt",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.main_mem);
$readmemh("main_mem.txt",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.inf1_mem);
$readmemh("image.hex",tb.u0_chip.u0_digcore.u_digcore_func.u0_flash_ctrl_top.BIS_JLFLE064K29DI.JLFLE064K29DI_i.main_mem);
end

内部的打印信息通过uart打印

always @(posedge tb.u0_chip.u0_digcore.u_digcore_func.u0_crm.apb1_clk) begin
  if((tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PADDR   == 'hF000) &&
     (tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PSEL    == 1'b1) &&
     (tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWRITE  == 1'b1) &&
     (tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PENABLE == 1'b1) &&
     (tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PREADY  == 1'b1)) 
  begin
    if(tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA == 'h23) begin//#
      $display("%t", $realtime);
    end
    else if(tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA == 'h24) begin//$
       $display("Test Case Passed! %0t", $time);
       $finish(1);
    end
    else if(tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA == 'h40) begin//@
       $display("Test Case Failed! %0t", $time);
       $finish(1);
    end
    else if(tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA == 'h2B) begin//+
       $display("Sync with SV! %0t", $time);
       sync <= 1;
    end
    else if(tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA == 'h2A) begin//*
       $display("env ready! %0t", $time);
       env_ready <= 1;
    end
    else begin
       $write("%c",tb.u0_chip.u0_digcore.u_digcore_func.u0_apb1_sys.PWDATA);
    end
  end
end

`ifdef GATE_SIM
initial begin
  force tb.u0_chip.u0_ana_wrap.ANA_VREF_V0P8 = 1'b1;
  force tb.u0_chip.u0_ana_wrap.ANA_IREF1_0P5U0 = 1'b1;
  force tb.u0_chip.u0_digcore.u0_PIN_MUX.pad_pd7_c = 1'b1;
  $deposit("u0_chip.u0_ana_wrap.u_ana_rcmf.q1", 1'b1);
  $deposit("u0_chip.u0_digcore.u_digcore_func.u0_crm.rchf_clk_48m", 1'b0);
end
`endif

`include "test.sv"

endmodule