verilog中pullup和pulldown的用法

pullup、pulldown的用法：

pullup或pulldown只对对当前无驱动的线wire才会有作用，若有驱动应该按照驱动信号来决定！
当线wire为z时，pullup或pulldonw才起作用！
也就是‘Z’可以变成‘1’或‘0’，而不是‘0’能变‘1’（‘1’变‘0’），否则就跟你设计想法不一样了。

以下的例子进一步说明了这个问题：

`timescale 1ns/1ps
module test();
reg a;
reg d;
wire b;
wire c;
wire e;
reg clk;

always #10 clk = ~clk;

initial begin
clk =1'b0;
d = 1'bx;
#100;
a = 1'b1;
#100;
a = 1'b0;
#100;
d = 1'bz;
#100;
$finish;
end
pulldown(b);
pulldown(c);
pulldown(e);
assign b = a;
assign e = d;

always@(posedge clk) begin
  $display("@%0t   a = %b  b = %b  c= %b  d = %b  e = %b  ",$realtime,a,b,c,d,e);
end

endmodule

结果如下所示：

@10000   a = x  b = x  c= 0  d = x  e = x  
@30000   a = x  b = x  c= 0  d = x  e = x  
@50000   a = x  b = x  c= 0  d = x  e = x   
@70000   a = x  b = x  c= 0  d = x  e = x  
@90000   a = x  b = x  c= 0  d = x  e = x   //pulldown(b);pulldown(c);pulldown(e);
@110000   a = 1  b = 1  c= 0  d = x  e = x  //#100  a=1'b1；assign b=a；assign e=d
@130000   a = 1  b = 1  c= 0  d = x  e = x  
@150000   a = 1  b = 1  c= 0  d = x  e = x  
@170000   a = 1  b = 1  c= 0  d = x  e = x  
@190000   a = 1  b = 1  c= 0  d = x  e = x  
@210000   a = 0  b = 0  c= 0  d = x  e = x  //#100 a=1'b0；assign a=b；assign e=d
@230000   a = 0  b = 0  c= 0  d = x  e = x  
@250000   a = 0  b = 0  c= 0  d = x  e = x  
@270000   a = 0  b = 0  c= 0  d = x  e = x  
@290000   a = 0  b = 0  c= 0  d = x  e = x  
@310000   a = 0  b = 0  c= 0  d = z  e = 0  //#100 d=1'bz；assign a=b；assign e=d
@330000   a = 0  b = 0  c= 0  d = z  e = 0  
@350000   a = 0  b = 0  c= 0  d = z  e = 0  
@370000   a = 0  b = 0  c= 0  d = z  e = 0  
@390000   a = 0  b = 0  c= 0  d = z  e = 0 

reg a没有驱动，所以为x；#100后，a被赋值为1；#100后，a被赋值为0；
wire b一直被a驱动，b和a的值一样，虽然有assign b=a, 但是a为开始为x，所以a和b一致；
wire c无驱动，但是有pulldown(c),所以c为0；
reg d刚开始被赋值为x，后来被赋值为z；
wire e一直被reg d驱动，刚开始d为x，所以e也为x，后来d被赋值为z，因为pulldown(e),所以e为1。