eric.z

摘要：(1)ISE translating Error:terminate called after throwing an instance of 'Xdm_Exception::InvalidFileFoIt may happen when you are runnning a unix station, your TMP directory is fulldelete unuseful thing... 阅读全文

摘要：版权声明：转载时请以超链接形式标明文章原始出处和作者信息及本声明http://bb2hh.blogbus.com/logs/43953273.html从一高手那里学来的：）ic中综合的基本要求就是设置各种外部环境，让工具综合出符合这种环境的网表。但是这种方法有些不好的地方，因为外部环境比较复杂，不能设置的100%符合要求。所以有如下和后端紧密接合的方法，当然现在cadence以及synopsys都... 阅读全文

摘要：http://blog.yam.com/yuhaolin/article/725974三種將資料在I/O間傳送的方法有1. Polling2. Interrupt-driven I/O3. DMA(Direct Memory Access)Polling：最簡單的方式讓I/O device與CPU溝通。I/O device只要將information放進status register，CPU會周期... 阅读全文

摘要：Lockup latches are nothing more than transparent latches. You use them to connect two scan-storage elements in a scan chain in which excessive clock skew exists. Let a circuit contains two flip-flops.... 阅读全文

摘要：STA fundamentala). Timing pathsTiming path Startpoints - Input ports,- Clock pins of flip-flopsTiming path Endpoints - Output ports, - all input pins of flip-flops except clock pinsNote: In STA, Setup... 阅读全文

摘要：http://www.socvista.com/bbs/viewthread.php?tid=4675BIST即是在设计时在电路中植入相关功能电路用于提供自我测试功能的技术，BIST把测试仪的部分功能转移到电路内部，用嵌入到电路中的测试电路提供输入测试向量和分析响应的功能，最后输出简单的测试结果。根据被测试的对象不同，BIST测试分为Logic BIST和Memory BIST。Logic BIS... 阅读全文

摘要：Troubleshooting Internal Hold Violationshttp://quartushelp.altera.com/9.1/mergedProjects/analyze/tan/tan_gid_hold_violate.htmThe Classic Timing Analyzer reports internal hold violations in the Clock H... 阅读全文

摘要：http://www.edaboard.com/thread84656.htmlSetup time fixing:1) reducing combinational logic delay by minimising number of logic levels2) splitting the combinational logic3) Implimenting Pipelining 4) Us... 阅读全文

摘要：http://asic-soc.blogspot.com/2008/04/clock-gating.htmlClock Gating Clock tree consume more than 50 % of dynamic power. The components of this power are: 1) Power consumed by combinatorial logic whose ... 阅读全文