SVGENDQ_MACRO宏解析
typedef struct { _iq Ualpha; // Input: reference alpha-axis phase voltage _iq Ubeta; // Input: reference beta-axis phase voltage _iq Ta; // Output: reference phase-a switching function _iq Tb; // Output: reference phase-b switching function _iq Tc; // Output: reference phase-c switching function _iq tmp1; // Variable: temp variable _iq tmp2; // Variable: temp variable _iq tmp3; // Variable: temp variable Uint16 VecSector; // Space vector sector } SVGEN;
SVGEN结构体:
输入变量:Ualpha(α轴基准相电压)
Ubeta(β轴基准相电压)
输出变量:Ta(参考A相开关函数)
Tb(参考B相开关函数)
Tc(参考C相开关函数)
/*----------------------------------------------------------------------------- Default initalizer for the SVGEN object. -----------------------------------------------------------------------------*/ #define SVGEN_DEFAULTS { 0,0,0,0,0 }
SVGEN对象的默认初始化
#define SVGENDQ_MACRO(v) \ v.tmp1= v.Ubeta; \ v.tmp2= _IQdiv2(v.Ubeta) + (_IQmpy(_IQ(0.866),v.Ualpha)); \ v.tmp3= v.tmp2 - v.tmp1; \ \ v.VecSector=3; \ v.VecSector=(v.tmp2> 0)?( v.VecSector-1):v.VecSector; \ v.VecSector=(v.tmp3> 0)?( v.VecSector-1):v.VecSector; \ v.VecSector=(v.tmp1< 0)?(7-v.VecSector) :v.VecSector; \ \ if(v.VecSector==1 || v.VecSector==4) \ { \
v.Ta= v.tmp2; \ v.Tb= v.tmp1-v.tmp3; \ v.Tc=-v.tmp2; \ } \ \ else if(v.VecSector==2 || v.VecSector==5) \ { \
v.Ta= v.tmp3+v.tmp2; \ v.Tb= v.tmp1; \ v.Tc=-v.tmp1; \ } \ \ else \ { \
v.Ta= v.tmp3; \ v.Tb=-v.tmp3; \ v.Tc=-(v.tmp1+v.tmp2); \ }