2010年9月24日
Shared-memory & Message Queue
摘要： Shared-memory blocks are perhaps the fastest IPC mechanism, especially for transferring large structures between processes. However, they require careful synchronization, or subtle bugs can occur i... 阅读全文
posted @ 2010-09-24 05:20 史莱姆 阅读(454) 评论(0) 推荐(0)
Trade Response Latency Reduced to Under Two Microseconds by Combining NASDAQ ITCH and OUCH into a Single FPGA
摘要： FPGA-based system outperforms CPU and hybrid CPU/FPGA trading platforms by consolidating feed handling, trade trigger logic, and order entry into a single FPGA. Seattle, WA – September 14, 20... 阅读全文
posted @ 2010-09-24 00:08 史莱姆 阅读(472) 评论(0) 推荐(0)