I2C controller core之Bit controller(01)

FPGA proven, AISC proven, I2C controller core from OpenCores  

http://opencores.org/project,i2c

 

Bit-controller

-- Translate simple commands into SCL/SDA transitions
-- Each command has 5 states, A/B/C/D/idle
--
-- start:    SCL  ~~~~~~~~~~~~~~\____
--           SDA  XX/~~~~~~~\______
--                x | A | B | C | D | i
--
-- repstart  SCL  ______/~~~~~~~\___
--           SDA  __/~~~~~~~\______
--                x | A | B | C | D | i
--
-- stop      SCL  _______/~~~~~~~~~~~
--           SDA  ==\___________/~~~~~
--                x | A | B | C | D | i
--
--- write    SCL  ______/~~~~~~~\____
--           SDA  XXX===============XX
--                x | A | B | C | D | i
--
--- read     SCL  ______/~~~~~~~\____
--           SDA  XXXXXXX=XXXXXXXXXXX
--                x | A | B | C | D | i
--

1　　ports declaration

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity i2c_master_bit_ctrl is
port (
          clk    : in std_logic;
          rst    : in std_logic;
          nRst   : in std_logic;
          ena    : in std_logic;                     -- core enable signal

          clk_cnt : in unsigned(15 downto 0);        -- clock prescale value 
　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　 --! type unsigned is array (natural range <>) of std_logic

          cmd     : in std_logic_vector(3 downto 0);
          cmd_ack : out std_logic;                   -- command completed
          busy    : out std_logic;                   -- i2c bus busy
          al      : out std_logic;                   -- arbitration lost

          din  : in std_logic;
          dout : out std_logic;

          -- i2c lines
          scl_i   : in std_logic;                    -- i2c clock line input
          scl_o   : out std_logic;                   -- i2c clock line output
          scl_oen : out std_logic;                   -- i2c clock line output enable, active low
          sda_i   : in std_logic;                    -- i2c data line input
          sda_o   : out std_logic;                   -- i2c data line output
          sda_oen : out std_logic                    -- i2c data line output enable, active low
);
end entity i2c_master_bit_ctrl;

2　　signals declaration

 1 -- architecture   
 constant I2C_CMD_NOP    : std_logic_vector(3 downto 0) := "0000";
 constant I2C_CMD_START  : std_logic_vector(3 downto 0) := "0001";
 constant I2C_CMD_STOP   : std_logic_vector(3 downto 0) := "0010";
 constant I2C_CMD_READ   : std_logic_vector(3 downto 0) := "0100";
 constant I2C_CMD_WRITE  : std_logic_vector(3 downto 0) := "1000";

 type states is (idle, start_a, start_b, start_c, start_d, start_e,stop_a,stop_b,
                  stop_c, stop_d, rd_a, rd_b, rd_c, rd_d, wr_a, wr_b, wr_c, wr_d);
 signal c_state : states;

 signal iscl_oen, isda_oen : std_logic;     -- internal I2C lines
 signal sda_chk　　　　 : std_logic;  　　　　-- check SDA status (multi-master arbitration)
 signal dscl_oen　　　　: std_logic;  　　　　-- delayed scl_oen signals
 signal sSCL, sSDA　　　: std_logic;  　　　　-- synchronized SCL and SDA inputs
 signal dSCL, dSDA 　　: std_logic;  　　　　 -- delayed versions of sSCL and sSDA
 signal clk_en         : std_logic;  　　　　-- statemachine clock enable
 signal scl_sync, slave_wait : std_logic;   -- clock generation signals
 signal ial            : std_logic;         -- internal arbitration lost signal
 signal cnt            : unsigned(15 downto 0); -- clock divider counter (synthesis)

22 -- block
 signal cSCL, cSDA  : std_logic_vector(1 downto 0); -- capture SDA and SCL
 signal fSCL, fSDA  : std_logic_vector(2 downto 0); -- filter inputs for SCL and SDA
 signal filter_cnt    : unsigned(13 downto 0);      -- clock divider for filter
 signal sta_condition : std_logic;          -- start detected
 signal sto_condition : std_logic;          -- stop detected
 signal cmd_stop      : std_logic;          -- STOP command
 signal ibusy         : std_logic;          -- internal busy signal

3　assign outputs

1     -- assign outputs
    scl_o   <= '0';
    scl_oen <= iscl_oen;
    sda_o   <= '0';
    sda_oen <= isda_oen;