2013年8月29日
verilog FAQ
摘要： 1. What is the race condition in verilog?Ans :The situation when two expressions are allowed to execute at same instance of time without mentioning the order of execution.2. List the levels of abstraction in verilog?Ans : 1. Behavioral level 2. Register-Transfer level 3. Gate level 4. Switch levels3 阅读全文
posted @ 2013-08-29 17:38 鱼游时光 阅读(1337) 评论(0) 推荐(0)