09 2014 档案

Sharc FLAGS I/O Register(flag0~3)
摘要：Core FLAG Pins Multiplexing This module also includes the multiplexers of the FLAG0-3 pins shown in Figure 24-9. The FLAG0-2 pins can act as core FLAGS0-2 or IRQ0-2, or a memory sel... 阅读全文
posted @ 2014-09-10 13:47 ldjrllove 阅读(492) 评论(0) 推荐(0)
ADI SHARC 学习之PLL
摘要：PLL Block Diagram Power Management Registers (PMCTL, PMCTL1)The following sections describe the registers associated with the processors power management functions. ... 阅读全文
posted @ 2014-09-03 10:38 ldjrllove 阅读(637) 评论(0) 推荐(0)