2013年4月2日
（笔记）关于Verilog中的一元约简运算符
摘要： 一元简约运算符 阅读全文
posted @ 2013-04-02 20:56 Kuvon 阅读(2935) 评论(0) 推荐(0)
（笔记）设计实例 - Cyclone III DDR2 SDRAM ALTMEMPHY 167MHz x32
摘要： Last Major UpdateInitial Release - December 16th 2010 – Cyclone III DDR2 SDRAM x32 167MHz, Quartus II v7.2, DDR2 SDRAM High Performance Controller, Cyclone III FPGA development kit.Design OverviewThis design is meant as a demo style lab. It very briefly covers the steps required to successfully get 阅读全文
posted @ 2013-04-02 10:48 Kuvon 阅读(1596) 评论(0) 推荐(0)