2022年3月15日
always_latch is equivalent to always @(clk, d)
摘要： always_latch is equivalent to always @(clk, d) and is the preferred idiom for describing a latch in SystemVerilog. It evaluates whenever clk or d chan 阅读全文
posted @ 2022-03-15 19:10 华容道专家 阅读(101) 评论(0) 推荐(0)