PDP-10

... Bill Gates and other students sought time on systems including DEC PDP minicomputers. One of these systems was a PDP-10...

Digital Equipment Corporation (DEC)'s PDP-10, later marketed as the DECsystem-10, is a mainframe computer family manufactured beginning in 1966 and discontinued in 1983.

The original PDP-10 processor is the KA10, introduced in 1968. It uses discrete transistors packaged in DEC's Flip-Chip technology, with backplanes wire wrapped via a semi-automated manufacturing process. Its cycle time is 1 μs and its add time 2.1 μs. [每秒可做476,190次加法] The KA10 weighs about 1,920 pounds (870 kg). 

The KA10 has a maximum main memory capacity (both virtual and physical) of 256 kilowords (equivalent to 1152 kilobytes); the minimum main memory required is 16 kilowords (72k bytes). The PDP-10 has 36-bit words and 18-bit word addresses. There are 16 general-purpose, 36-bit registers.

In the original KA-10 systems, these registers are simply the first 16 words of main memory. The "fast registers" hardware option implements them as registers in the CPU, still addressable as the first 16 words of memory. Some software takes advantage of this by using the registers as an instruction cache by loading code into the registers and then jumping to the appropriate address; this is used, for example, in Maclisp to implement one version of the garbage collector. Later models all have registers in the CPU.

The modules were called "Flip-Chips" because early versions of some of these modules, for example, the R107 module shown, used hybrid integrated circuits built using flip chip mounting of individual diode chips on a ceramic substrate. Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting semiconductor devices, such as IC chips and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads.