CSE6010总体框架整理

CSE6010总体框架整理

list

• FIFO
• LIFO
• stack (Array implementation)
• Queue(circular array implementation)
• stack(linked list implementation)
• Queue(linked list implementation)
• Dequeue(doubly linked list implementation)
• PQ(linked list implementation for less node, if there exist more nodes, some more efficient data structure exists)

heap

• PQ(heap data structure for implement PQ if there are lots of data)
• heap data structure(很怪的是 这种数据结构是由full binary tree这种数据结构实现的，所以heap更像是一种思想 他指的是每个node的权重大于或者小于其两个子节点才能叫heap)
• implementation of heap(use array or linked list) 本质上 heap是树这种数据结构的一种（这里可以深究一下）https://blog.csdn.net/AllenWells/article/details/77855045

algorithm complexity

• 在计算性能复杂度之前 做的假设（比如说规定了四则运算是常数复杂度 没有并发计算，focus on asymptotic performance for input size N, focus on growth in execution time as input size increases to arbitrarily values, focus on worst case performance）
• Big O definition(用于最坏情况的分析)
• algorithm classes

graphs representation

• Matrix implementation(adjacent matrix)
• linked list implementation(adjacent list)

graph search

• BFS(queue implementation)(spanning tree)
• DFS(stack implementation)(shortest path)
• the recursion version and iteration version of implement DFS

shortest path

• bellman-ford algorithm
• dijkstra algorithm
• the comparison between two methods

all shortest path

• using matrix multiplication to analysis the time complexity of all shortest path algorithm

sorting

• heap sort
• insertion sort
• merge sort
• quick sort
• count sort
• loop invariant

search

• binary search
• BST and its operations
• three ways of tree traversals

hash tables:(也算是基础的数据结构的一种吗)

• the implementation of hash tables
• hashing function
• conflict resolutions

DP

• the difference between DP and (divide and conquer)
• solution methodology(top down and bottom up)
• fibonacci numbers
• LCS problem

data representation()

• ways to representing data
• binary numbers
• N-bit values
• three ways to representing negative numbers(sign magnitude representation, one’s complement representation, two’s complement representation)
• the arithmetic of two’s complement
• overflow
• sign extension
• the implementation of multiplication and division
• hexadecimal
• other problems with integers(really large numbers and fractions)
• other special cases(really small numbers, INF, -INF, NaN(0/0))
• logical operations
• Text: ASCII characters
• other data types: Text strings, image, fixed point numbers

hardware and logic:

• 本章会讲很多概念 首先来一个总的概括：
  
• three components of hardware(wire, power source, switch/transistor)
• semiconductors enable us to create transistors(voltage controlled switch)
• switches enable us to create basic logic gates
• boolean algebra enables us to create arbitary boolean functions from logic gates(logical completeness: {AND, OR, NOT} {NAND})//注意 A+B是OR，AB才是AND。
• logic functions enable us to implement basic computational operations(eg: arithmetic)
• 有个问题就是电路图没看太懂（AND OR的底层实现逻辑电路）

Memory and sequential circuits(finite state machines):

• clock signal
• memory: D latch(aka D flip flop)
• N-bit register
• RAM:random access memory
• binary encoding and unary encoding（https://www.cnblogs.com/wangguchangqing/p/6297792.html）
• decoder: decoder circuit converts binary encoding to unary.
• RAM implementation: static RAM and dynamic RAM(分别缩写为SRAM和DRAM)
• what is the difference between sequential circuits and combinational circuits?
• what is sequential circuits(finite state machines)?
• how to design finite state machine ?(example candy machine:后面的state diagram, next state and output functions , time to complete FSM operations都是其步骤)
• summary: memory, memory 和seq circuits的联系， seq circuits的具体设计流程。
• 什么是图灵机？

Instruction Set Architecture(machine language):

• 分为三部分：von neumann model, Instruction set architecture, 以及最后的example.
• machine language的意义在于defines interface between hardware and software.
• what is the difference between finite state machine and computer?
• Von Neumann machine model(I/O devices, CPU, Main memory)
• memory的speed和size的平衡
• 电脑的基本处理单元叫word, 如今的word有32bit和64bit的，地址通产是一个word。虽然电脑可以处理其他size of data, 但是需要More effort。
• 例题 如何把C mapping to the machine?(将C的data type和program instructions分别complier 成machine data type and machine instructions, 就是相当于把C语言转换成机器语言)
• 我们为什么需要机器的ISA（Instruction Set Architecture）？因为高级语言如C很难让机器直接执行，机器只能执行very simple set of instruction called the machine’s ISA.
• what is ISA elements? and what is the program counter(PC)?(PC: address of the next instruction to be executed)
• 什么是machine instructions? (包括一个operation 以及0个或多个operands)
• ISA主要有哪些种类？（zero address(stack machine), one address(accumulator), two address(register oriented), three address(register oriented)）
• 下面是详细介绍这三个种类（没看太懂其实）
• example: LC-3的instruction set
• summary: von neumann是主流架构 但是却受限于neumann bottle neck. Proram 和data存在了内存里面 但是需要传入CPU来进行计算。machine ISA定义了硬件的哪一部分是可以被complier和程序员看到的.

machine organization:

• 机器组织在计算机抽象层次里的位置如何？（是比machine ISA还要底层的一层，他主要是implementation of the ISA）
• 本节大致分为三部分：CPU的组织方式（data path和control unit）,data path design, control unit design.
• what is interpreter?
• control unit和data path为什么能作为CPU组织的一部分？因为这两个一个是control 一个是action. 结合von neumann model,总结性的来说 ，CPU只做一件事： move bits from one place to another.
• 接下来中间就完全不知道是在讲什么了 先跳过这一段 直接看总结部分
• summary: 1. CPU = data path+ control unit 2. data path design(determine what components you need) 需要design的东西包括：可以被程序员或者编译器看到的(program counter,registers, condition codes), memory and memory interface(MAR, MDR), instruction register(IR), ALUs(运算逻辑单元) 3. control unit(设计finite state machine): implement instruction process cycle 以及 确定data path design中各个部分的联系。

Parallel:

• Programming models: MIMD/SIMD, shared memory/message passing
• Shared memory model
• issues needs to be addressed in concurrency: race conditions, deadlock.
• ways to address race conditions: add critical section
• ways to address deadlock: imposing a fixed sequence in which locks must be obtained(e.g. always lock A before attempting to lock B)

Stacks:

• runtime stacks uses as to programming language implementation(the bridge between programming language and OS)
• pass by value and pass by reference

IO, interrupts and traps:

• what is the difference between polling and interrupts? the first one is the CPU keeps checking the status register until new data arrives OR device ready for next data. but the second one is to wake CPU when data coming.
• how to implement interrupts? add Int(interrupts status signal)
• in what circumstances do we have to use interrupts?3
• what is trap? 本质上和interrupts一样 除了traps是由CPU生成 而不是 外部设备生成。
• 其他相关概念：devices register, memory mapped I/O, interrupts vector.
• I/O, interrupts handlers, trap是由system software developer决定

Execution time and pipelines:

• execution time要解决的问题：how long does it take to execute this program.
• execution time计算公式：execution time = N * CPI * cycle time, 其中N是执行的machine instruction 的次数，CPI是每张instruction 执行所需要的clock cycles, cycle time: 1/clock rate. 而instruction常见的有ADD LDR BRz-T, BRz-NT执行所需时长略有不同。
• 如何加快执行速度：从公式入手 减小三个项目的大小，下面分别来看。
• 减小N：即减小执行得machine instruction 的次数。这个可以通过 改进instruction set design 和优化compiler
• 减小CPI：即减小每个instruction执行所需要的时间 这个可以通过 重新设计CPU，优化instruction set design, 优化compiler, 加入pipeline, 加入cache memory来实现，后两者是下面两节的主题。
• 减小cycle time:即增加计时频率，这个可以通过设计更快的circuits(Dennard scalling说明这个过程在过去很多年内被稳步推进)。
• CPU流水线技术
• 流水线技术存在的问题及解决方法：structural hazard, control hazard, data hazard
• https://zhuanlan.zhihu.com/p/69262290 https://www.cnblogs.com/dragonir/p/6196602.html

Cache Memory:

• 为什么cache能用来提高速度？因为locality of reference
• cache与register file的对比
• three aspects when design cache: placement policy, replacement policy, write policy.
• 上述三个方面对应三个问题：如何在cache中找到我们需要的block? 当缓存已满，如何确定我们需要替换哪个block以加新的block?写入操作是如何操作的？
• 对应上面三个问题 有三个解答：1 用hash table 2 用 direct mapped cache/fully associative cache/k-way set associative cache 3 未完待续
• multilevel caches:
• multiprocessor caches: