CoryXie

一垄青竹映陋室，半枝桃花衬碧窗。
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随笔分类 -  Hardware Works

Core abstraction layer for telecommunication network applications
摘要：A new sub-system, the core abstraction layer (CAL), is introduced to the middleware layer of the multi-core processor based modem board. This new module provides an abstraction for the multi-core FSL ... 阅读全文
posted @ 2014-09-15 23:08 CoryXie

Lock-less and zero copy messaging scheme for telecommunication network applications
摘要：A computer-implemented system and method for a lock-less, zero data copy messaging mechanism in a multi-core processor for use on a modem in a telecommunications network are described herein. The meth... 阅读全文
posted @ 2014-09-15 23:05 CoryXie

Methods and systems for sharing common job information
摘要：Apparatus and methods are provided for utilizing a plurality of processing units. A method comprises selecting a pending job from a plurality of unassigned jobs based on a plurality of assigned jobs f... 阅读全文
posted @ 2014-09-15 22:59 CoryXie

Lock-less buffer management scheme for telecommunication network applications
摘要：A buffer management mechanism in a multi-core processor for use on a modem in a telecommunications network is described herein. The buffer management mechanism includes a buffer module that provides b... 阅读全文
posted @ 2014-09-15 22:05 CoryXie

System and method for assigning a message
摘要：A processor of a plurality of processors includes a processor core and a messagemanager. The messagemanageris in communication with the processor core. The messagemanagerto receive a message from... 阅读全文
posted @ 2014-09-15 21:27 CoryXie

Inter-partition communication in multi-core processor
摘要：A multi-core processor includes logical partitions that have respective processor cores, memory areas, and Ethernet controllers. At least one of the Ethernet controllers is disabled for external commu... 阅读全文
posted @ 2014-09-15 21:18 CoryXie

Interrupt distribution scheme for a computer bus
摘要：A method of handling processor to processor interrupt requests in a multiprocessing computer bus environment is described. This method allows a multiple-tiered, increasing priority, interrupt request ... 阅读全文
posted @ 2014-09-09 22:10 CoryXie

Input/output subsystem having an integrated advanced programmable interrupt controller for use in a personal computer
摘要：A computer system is described having one or more host processors, a host chipset and an input/output (I/O) subsystem. The host processors are connected to the host chipset by a host bus. The host chi... 阅读全文
posted @ 2014-09-09 21:35 CoryXie

Bit error testing and training in double data rate (ddr) memory system
摘要：DDR PHY interface bit error testing and training is provided for Double Data Rate memory systems. An integrated circuit comprises a bit error test (BERT) controller that provides a bit pattern; and a ... 阅读全文
posted @ 2014-08-15 15:54 CoryXie

Method for training dynamic random access memory (DRAM) controller timing delays
摘要：Timing delays in a double data rate (DDR) dynamic random access memory (DRAM) controller (114, 116) are trained. A left edge of passing receive enable delay values is determined (530). A final value o... 阅读全文
posted @ 2014-08-15 09:50 CoryXie

Power management in semiconductor memory system
摘要：A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coup... 阅读全文
posted @ 2014-08-04 16:55 CoryXie

Method and apparatus for training a memory signal via an error signal of a memory
摘要：Described herein is a method and an apparatus for training a memory signal via an error signal of a memory. The method comprises transmitting from a memory controller a command-address (C/A) signal to... 阅读全文
posted @ 2014-08-04 10:56 CoryXie

双倍数据速率内存的内存控制器及其控制方法
摘要：本发明公开了一种双倍数据速率内存的内存控制器及其控制方法。内存控制器中包括仲裁器、主状态机、刷新管理单元、寄存器和功耗管理单元；主状态机向功耗管理单元反馈双倍数据速率内存的状态；根据功耗管理模块的通知，控制双倍数据速率内存进入或退出预充电掉电状态；功耗管理单元在双倍数据速率内存进入激活待机状态后，通知主状态机控制双倍数据速率内存进入预充电掉电状态，并在仲裁器指示当前接收到读写命令或刷新管理单元指示... 阅读全文
posted @ 2014-07-23 01:32 CoryXie

Fast exit from dram self-refresh
摘要：Embodiments of the invention describe a dynamic random access memory (DRAM) device that may abort a self-refresh mode to improve the exit time from a DRAM low power state of self-refresh. During execu... 阅读全文
posted @ 2014-07-23 01:21 CoryXie

Memory device control for self-refresh mode
摘要：To ensure that a memory device operates in self-refresh mode, the memory controller includes (1) a normal-mode output buffer for driving a clock enable signal CKE onto the memory device's CKE input an... 阅读全文
posted @ 2014-07-23 01:01 CoryXie

Configuring a remote m-phy
摘要：An interface for low power, high bandwidth communications between units in a device in provided herein. The interface comprises a USB 3.0 system interface and a SuperSpeed inter-chip (SSIC) protocol a... 阅读全文
posted @ 2014-07-20 23:10 CoryXie