摘要：上一篇扒了single-core的实现，这篇记录一些扩展到多核的思路。 1. 单个AIE core 对于单核，这里假设矩阵乘计算的输入输出为A[m*k] x B [k*n] = C[m*n] 2. 扩展成一条chain：级联 k的维度是需要乘累加起来的，假设k为2048，分到2个核上，每个核就只需要 阅读全文

摘要：ref: https://github.com/Xilinx/Vitis-Tutorials/blob/2021.2/AI_Engine_Development/Feature_Tutorials/07-AI-Engine-Floating-Point/MatMult/aie/aie_kernels 阅读全文

摘要：ref: https://www.xilinx.com/html_docs/xilinx2020_2/vitis_doc/yii1603912637443.html https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_ 阅读全文

摘要：记录一下，至少玩过 截图于以下链接 https://www.xilinx.com/support/documentation/architecture-manuals/am009-versal-ai-engine.pdf https://www.xilinx.com/support/document 阅读全文