（转）fMAX及其计算公式

本文转自Altera公司网站，完全copy，主要解说fmax，并给出具体计算公式。。。。。。。。。。。

 

The maximum clock frequency that can be achieved without violating internal setup (t_SU) and hold (t_H) time requirements. Unrestricted f_MAX is the maximum frequency at which a design can run. Restricted f_MAX is the maximum frequency a design can run considering device limits, such as maximum toggle rates. The Classic Timing Analyzer analyzes and reports f_MAX following timing analysis.

You can specify the f_MAX required by default for a design in the Classic Timing Analysis Settings page of the Settings dialog box. You can also specify the required f_MAX of individual clock signals in a design by creating clock settings and assigning them to signals in the design.

The Classic Timing Analyzer calculates f_MAX with the following equation:

f_MAX = 1/(<register to register delay> - <clock skew delay> + <micro setup delay> + <micro clock to output delay>)

Clock skew delay is calculated with the following equation:

<clock to destination register delay> - <clock to source register delay>