摘要: 前置条件: DDR模式 LR RISE:1.9-2.1 FALL:1.9-2.1 约束情况1: value:0 IBUF-BUFG-IDELAYE2-IDDR value:0 IBUF-IDELAYE2-IDDR module rgmii_dphy ( input wire sys_rst_n , 阅读全文
posted @ 2024-04-27 13:20 NoNounknow 阅读(56) 评论(0) 推荐(0)