Posted on 2008-07-01 15:06
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Verilog 、
SOC
Abstract
UltraEdit預設沒有支援Verilog語言，該如何讓UltraEdit顯示出Verilog的語法關鍵字呢?
Introduction
Step 1：
修改wordfile.txt
在C:\Program Files\UltraEdit-32\wordfile.txt加入以下資料
/L14"Verilog 1364-2001" Line Comment = // Block Comment On = /* Block Comment Off = */ Block Comment On Alt = (* Block Comment Off Alt = *) String Chars = " File Extensions = V VL VMD
/Delimiters = ~!@%^&*()-+=|\/{}[]:;"<> ,
/Function String = "%[ ^t]++^(config[ ^t^p]+[a-zA-Z0-9_]+^)"
/Function String 1 = "%[ ^t]++^(module[ ^t^p]+[a-zA-Z0-9_]+^)[ ^t^p]++[(;#]"
/Function String 2 = "%[ ^t]++^(task[ ^t^p]+[~(;]+^)[ ^t^p]++[(;#]"
/Function String 3 = "%[ ^t]++^(function[ ^t^p]+[~(;]+^)[ ^t^p]++[(;#]"
/Function String 4 = "%[ ^t]++^(primitive[ ^t^p]+[~(;]+^)[ ^t^p]++[(;#]"
/Function String 5 = "begin[ ^t^p]++^(:[ ^t^p]++[a-zA-Z0-9_]+^)"
/Indent Strings = "begin" "case" "fork" "specify" "table" "config"
/Unindent Strings = "end" "endcase" "join" "endspecify" "endtable" "endconfig"
/Open Fold Strings = "module" "task" "function" "generate" "primitive" "begin" "case" "fork" "specify" "table" "config" "`ifdef"
/Close Fold Strings = "endmodule" "endtask" "endfunction" "endgenerate" "endprimitive" "end" "endcase" "join" "endspecify" "endtable" "endconfig" "`endif"
/C1"Keywords"
always and assign automatic
begin buf bufif0 bufif1
case casex casez cell cmos config
deassign default defparam design disable
edge else end endcase endconfig endmodule endfunction endgenerate endprimitive endspecify endtable endtask event
for force forever fork function
generate genvar
highz0 highz1
if ifnone initial inout input instance integer
join
large liblist library localparam
macromodule medium module
nand negedge nmos none nor noshowcancelled not notif0 notif1
or output
parameter pulsestyle_onevent pulsestyle_ondetect pmos posedge primitive pull0 pull1 pullup pulldown
real realtime reg release repeat rcmos rnmos rpmos rtran rtranif0 rtanif1
scalared showcancelled signed small specify specparam strength strong0 strong1 supply0 supply1
table task time tran tranif0 tranif1 tri tri1 tri0 triand trior trireg
use
vectored
wait wand weak0 weak1 while wire wor
xnor xor
/C2"System"
** .
** 'b 'B 'o 'O 'd 'D 'h 'H 'sb 'sB 'so 'sO 'sd 'sD 'sh 'sH 'Sb 'SB 'So 'SO 'Sd 'SD 'Sh 'SH
** $
$async$and$array $async$and$plane $async$nand$array $async$nand$plane $async$nor$array $async$nor$plane $async$or$array $async$or$plane
$bitstoreal
$countdrivers
$display $displayb $displayh $displayo
$dist_chi_square $dist_erlang $dist_exponential $dist_normal $dist_poisson $dist_t $dist_uniform
$dumpall $dumpfile $dumpflush $dumplimit $dumpoff $dumpon $dumpportsall $dumpportsflush $dumpportslimit $dumpportsoff $dumpportson $dumpvars
$fclose $fdisplayh $fdisplay $fdisplayf $fdisplayb $ferror $fflush $fgetc $fgets $finish $fmonitorb $fmonitor $fmonitorf $fmonitorh $fopen $fread $fscanf $fseek $fsscanf $fstrobe $fstrobebb $fstrobef $fstrobeh $ftel $fullskew $fwriteb $fwritef $fwriteh $fwrite
$getpattern
$history $hold
$incsave $input $itor
$key
$list $log
$monitorb $monitorh $monitoroff $monitoron $monitor $monitoro
$nochange $nokey $nolog
$period $printtimescale
$q_add $q_exam $q_full $q_initialize $q_remove
$random $readmemb $readmemh $realtime $realtobits $recovery $recrem $removal $reset_count $reset $reset_value $restart $rewind $rtoi
$save $scale $scope $sdf_annotate $setup $setuphold $sformat $showscopes $showvariables $showvars $signed $skew $sreadmemb $sreadmemh $stime $stop $strobeb $strobe $strobeh $strobeo $swriteb $swriteh $swriteo $swrite $sync$and$array $sync$and$plane $sync$nand$array $sync$nand$plane $sync$nor$array $sync$nor$plane $sync$or$array $sync$or$plane
$test$plusargs $time $timeformat $timeskew
$ungetc $unsigned
$value$plusargs
$width $writeb $writeh $write $writeo
/C3"Operators"
!
%
&
*
+
,
-
// /
:
;
<
=
>
?
@
^
{
|
}
~
/C4"Directives"
** `
`accelerate `autoexepand_vectornets
`celldefine
`default_nettype `define `default_decay_time `default_trireg_strength `delay_mode_distributed `delay_mode_path `delay_mode_unit `delay_mode_zero
`else `elsif `endcelldefine `endif `endprotect `endprotected `expand_vectornets
`file
`ifdef `ifndef `include
`line
`noaccelerate `noexpand_vectornets `noremove_gatenames `noremove_netnames `nounconnected_drive
`protect `protected
`remove_gatenames `remove_netnames `resetall
`timescale
`unconnected_drive `undef `uselib
/C5"DelaysParametersEscaped"
#
** \