Patent Tips - 随笔分类(第4页) - CoryXie

Detecting a return-oriented programming exploit

摘要：A method and apparatus for detecting a Return-Oriented Programming exploitation. At a computer device, a mechanism to detect a control transfer of a code location in a memory is established. This may ... 阅读全文

posted @ 2014-09-09 17:59 CoryXie

System and method for critical address space protection in a hypervisor environment

摘要：A system and method in one embodiment includes modules for detecting an access attempt to a criticaladdressspace(CAS) of a guest operating system (OS) that has implementedaddressspacelayoutrand... 阅读全文

posted @ 2014-09-09 16:24 CoryXie

Method of address space layout randomization for windows operating systems

摘要：A system and method foraddressspacelayoutrandomization("ASLR") for a Windows operating system is disclosed. Theaddressspacelayoutincludes one or more memory regions that are identified and th... 阅读全文

posted @ 2014-09-09 14:19 CoryXie

Method for address space layout randomization in execute-in-place code

摘要：The present application relates generally to laying outaddressspace for execute-in-place code and, more specifically, to a method for addressspacelayoutrandomizationfor such code. Ahead of execu... 阅读全文

posted @ 2014-09-09 12:48 CoryXie

System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time

摘要：In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that aVMMtimer indicator is set to an enabling value, and ident... 阅读全文

posted @ 2014-09-09 00:51 CoryXie

Stack switching mechanism in a computer system

摘要：A method and mechanism for performing an unconditional stack switch in a processor. A processor includes a processing unit coupled to a memory. The memory includes a plurality of stacks, a special mod... 阅读全文

posted @ 2014-09-09 00:33 CoryXie

Hypervisor, computer system, and virtual processor scheduling method

摘要：Ahypervisorcalculates the total number of processor cycles (the number of processor cycles of one or more physical processors) in a first length of time based on the sum of the operating frequencies... 阅读全文

posted @ 2014-09-08 22:16 CoryXie

Hypervisor scheduler

摘要：Techniques for configuring ahypervisorschedulerto make use of cache topology of processors and physical memory distances between NUMA nodes when making scheduling decisions. In the same or other em... 阅读全文

posted @ 2014-09-08 21:54 CoryXie

Dynamic device virtualization

摘要：A system and method for providing dynamic device virtualization is herein disclosed. According to one embodiment, the computer-implemented method includes providing a hypervisor and one or more guest ... 阅读全文

posted @ 2014-09-08 21:41 CoryXie

Linear to physical address translation with support for page attributes

摘要：Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support forpage attributes. In some embodiments, a system rece... 阅读全文

posted @ 2014-09-08 18:36 CoryXie

Virtualizing memory type

摘要：A processor, capable of operation in a host machine, includingmemory management logic to support a plurality ofmemorytypes for a physicalmemory access by the processor, and virtualization support ... 阅读全文

posted @ 2014-09-08 16:38 CoryXie

Virtualizing physical memory in a virtual machine system

摘要：A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual ma... 阅读全文

posted @ 2014-09-07 12:52 CoryXie

Instruction-Set Support for Invocation of VMM-Configured Services without VMM Intervention

摘要：A processing core comprising instruction execution logic circuitry and register space. The register space to be loaded from aVMCS, commensurate with a VM entry, with information indicating whether a ... 阅读全文

posted @ 2014-09-07 10:27 CoryXie

Satisfying memory ordering requirements between partial reads and non-snoop accesses

摘要：A method and apparatus for preservingmemoryordering in a cache coherent link based interconnect in light of partial and non-coherentmemoryaccesses is herein described. In one embodiment, partialm... 阅读全文

posted @ 2014-09-05 17:47 CoryXie

Multi-core compute cache coherency with a release consistency memory ordering model

摘要：A method includes storing, with a first programmable processor, shared variable data to cache lines of a first cache of the first processor. The method further includes executing, with the first progr... 阅读全文

posted @ 2014-09-05 17:36 CoryXie

供多处理器系统中的高速缓存同步中使用的转发状态

摘要：这里所述的是一种具有五种状态的高速缓存同步协议，该五种状态为：修改、排它、共享、无效和转发(MESIF)。所述MESIF高速缓存同步协议包括转发(F)状态，该状态指明单个数据副本，从所述数据副本中能够产生另一个副本。利用F状态下的超高速缓冲存储器行来响应对超高速缓冲存储器行的副本的请求。在一个实施例中，将新创建的副本置于F状态下并将先前处于F状态下的超高速缓冲存储器行置成共享(S)状态或无效(I)... 阅读全文

posted @ 2014-09-05 09:39 CoryXie

供多处理器系统中的高速缓存同步中使用的转发状态

摘要：这里所述的是一种具有五种状态的高速缓存同步协议，该五种状态为：修改、排它、共享、无效和转发(MESIF)。所述MESIF高速缓存同步协议包括转发(F)状态，该状态指明单个数据副本，从所述数据副本中能够产生另一个副本。利用F状态下的超高速缓冲存储器行来响应对超高速缓冲存储器行的副本的请求。在一个实施例中，将新创建的副本置于F状态下并将先前处于F状态下的超高速缓冲存储器行置成共享(S)状态或无效(I)... 阅读全文

posted @ 2014-09-04 22:49 CoryXie

Double prefix overrides to provide 16-bit operand size in a 32/64 operating mode

摘要：A processor supports an operating mode in which the default address size is greater than 32 bits and the default operand size is 32 bits. The default address size may be nominally indicated as 64 bits... 阅读全文

posted @ 2014-09-03 00:55 CoryXie

Method and apparatus for loading a segment register in a microprocessor capable of operating in multiple modes

摘要：A microprocessor contains an address generation unit, including a segment block, for loadingdescriptordata and a segment selector in a segment register. Twodescriptorloads from aglobaldescriptor... 阅读全文

posted @ 2014-09-02 23:26 CoryXie

Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system

摘要：A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual ma... 阅读全文

posted @ 2014-09-02 09:40 CoryXie

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