STM32 Timer : Auto-reload register register

Auto-reload register (TIMx_ARR)

The auto-reload register is preloaded.

Writing to or reading from the auto-reload register accesses the preload register.

The content of the preload register are transferred into the shadow register permanently

or at each update event (UEV), depending on the auto-reload preload enable bit (ARPE) in TIMx_CR1 register.

The update event is sent when the counter reaches the overflow (or underflow when downcounting)

and if the UDIS bit equals 0 in the TIMx_CR1 register.

It can also be generated by software.

The generation of the update event is described in detailed for each configuration.

ARPE: Auto-reload preload enable

0: TIMx_ARR register is not buffered -- Async Load
1: TIMx_ARR register is buffered ------ Sync Load

 

ARPE  = 0 , UEV = x : ARR preload register --> ARR shadow register

ARPE  = 1 , UEV = 1 : ARR preload register --> ARR shadow register